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Details, datasheet, quote on part number:FS6322-02
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Datasheet text preview:
FS6322-02
Three-PLL Clock Generator IC
1.0
· · · · · · · · ·
Features
2.0
Description
Three PLLs with deep reference, feedback, and post dividers to provide precision clock frequencies Multiple outputs provide several clocking options Suspend feature shuts down a selection of PLLs and outputs for power conservation Outputs may be tristated for board testing S0 and S1 frequency select inputs modify output frequencies for design flexibility Glitch-free slewing of CLK_CPU output enables downstream PLLs to remain locked 5V to 3.3V operation Accepts 5 to 30MHz crystals Custom frequency patterns, pinouts, and packages are available. Contact your local AMI Sales Representative for more information.
The FS6322 is a ROM-based CMOS clock generator IC designed to minimize cost and component count in a variety of electronic systems. Three low-jitter phase-locked loops (PLLs) drive up to five low-skew clock outputs to provide a high degree of flexibility. A buffered copy of the reference clock is also available. The device is packaged in a 16-pin SOIC to minimize board space.
Figure 1: Pin Configuration
CLK_C VDD VSS XIN XOUT XBUF CLK_D CLK_CPU
1 2 3 16 15 14
OE SUSPEND# VDD S1 S0 VSS CLK_A CLK_B
FS6322
4 5 6 7 8
13 12 11 10 9
16-pin (0.150") SOIC
Figure 2: Block Diagram
OE XIN XOUT Crystal Oscillator PLL A XBUF CLK_A CLK_B PLL B PLL CPU Clock Logic CLK_C CLK_D CLK_CPU
S1:S0 SUSPEND#
FS6322
This document contains information on a product under development. American Microsystems, Inc. reserves the right to change or discontinue this product without notice.
ISO9001
3.1.02
FS6322-02
Three-PLL Clock Generator IC
Table 1: Pin Descriptions
Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DIU = Input with Internal Pull-Up; DID = Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input, DO = Digital Output; P = Power/Ground; # = Active Low pin
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
TYPE DO P P AI AO DO DO DO DO DO P DI DI P DI DI
NAME CLK_C VDD VSS XIN XOUT XBUF CLK_D CLK_CPU CLK_A CLK_B VSS S0 S1 VDD SUSPEND# OE C clock output Power supply (5V to 3.3V) Ground Crystal oscillator feedback Crystal oscillator drive
DESCRIPTION
Buffered crystal oscillator frequency output D clock output CPU PLL output with controlled frequency slew rate A clock output B clock output Ground Frequency select control input for the CLK_CPU output Frequency select control input for the CLK_CPU output Power supply (5V to 3.3V) Active-low control input powers-down selected PLLs and outputs Output enable input: logic-high enables outputs; logic-low tristates outputs (high impedance)
Table 2: Frequency Table FS6322-02: 3.3 volt device
(all frequencies in MHz)
SUSPEND# S1 S0 FREF CLK_A (pin 10) CLK_B (pin 9) CLK_C (pin 1) CLK_D (pin 7) XBUF (pin 6) CLK_CPU (pin 8)
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
14.31818 14.31818
25.00000 20.00000
O FF 48.00000
O FF 66.00000
DO NOT USE DO NOT USE
O FF 24.57598
O FF 14.31818
O FF 14.31818
14.31818 14.31818
25.00000 20.00000
40.00000 48.00000
40.00000 83.00071
DO NOT USE DO NOT USE
40.00000 24.57598
14.31818 14.31818
24.57598 14.31818
2
3.1.02
FS6322-02
Three-PLL Clock Generator IC
3.0
Electrical Specifications
Table 3: Absolute Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These conditions represent a stress rating only, and functional operation of the device at these or any other conditions above the operational limits noted in this specification is not implied. Exposure to maximum rating conditions for extended conditions may affect device performance, functionality, and reliability.
PARAMETER Supply Voltage, dc (VSS = ground) Input Voltage, dc Output Voltage, dc Input Clamp Current, dc (VI VDD) Output Clamp Current, dc (VI VDD) Storage Temperature Range (non-condensing) Ambient Temperature Range, Under Bias Junction Temperature Lead Temperature (soldering, 10s) Input Static Discharge Voltage Protection (MIL-STD 883E, Method 3015.7)
SYMBOL VDD VI VO IIK IOK TS TA TJ
MIN. VSS-0.5 VSS-0.5 VSS-0.5 -50 -50 -65 -55
M AX. 7 VDD+0.5 VDD+0.5 50 50 150 125 150 260 2
UNITS V V V mA mA °C °C °C °C kV
CAUTION: ELECTROSTATIC SENSITIVE DEVICE
Permanent damage resulting in a loss of functionality or performance may occur if this device is subjected to a high-energy electrostatic discharge.
Table 4: Operating Conditions
PARAMETER Supply Voltage Ambient Operating Temperature Range Crystal Resonator Frequency Output Load Capacitance SYMBOL VDD TA fXIN CL CONDITIONS/DESCRIPTION 5V ± 10% 3.3V ± 10% MIN. 4.5 3 0 5 TYP. 5 3.3 M AX. 5.5 3.6 70 30 15 UNITS V °C MHz pF
3
3.1.02
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