Details, datasheet, quote on part number: A61L73081S-12
PartA61L73081S-12
CategoryMemory
Description128k X 8 Bit High Speed CMOS SRAM
CompanyAMIC Technology Corporation
DatasheetDownload A61L73081S-12 datasheet
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Features, Applications
Document Title X 8 BIT HIGH SPEED CMOS SRAM Revision History
Features

Center power pinout Supply voltage: 5Vą10% Access times: 12/15 ns (max.) Current: Operating: -12: 170mA (max.) -15: 165mA (max.) Standby: TTL: 25mA (max.) CMOS: 8mA (max.) Full static operation, no clock or refreshing required All inputs and outputs are directly TTL compatible Common I/O using three-state output Data retention voltage: 3V (min.) Available / 400mil SOJ packages

The is a high-speed 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates a 5V power supply. It is built using high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Minimum standby power is drawn by this device when chip enable is disable, independent of the other input levels. Data retention is guaranteed at a power supply voltage as low as 3V.

Pin No. Symbol - I/O7 Description Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable Power Supply Ground


 

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