Details, datasheet, quote on part number: A62S6308M-70SI
PartA62S6308M-70SI
CategoryMemory => SRAM => SRAM
TitleSRAM
DescriptionSRAM Low Power & Low Voltage 0.5Mb x8
CompanyAMIC Technology Corporation
DatasheetDownload A62S6308M-70SI datasheet
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Features, Applications
Document Title X 8 BIT LOW VOLTAGE CMOS SRAM Revision History

Initial issue Modify TSOP (TSSOP) pin configuration. Modify SOP 32L, TSOP 32L and TSSOP 32L type packages outline dimensions.

Change TSSOP 32L type package to sTSOP 32L. Modify sTSOP 32L type package LE symbol dimensions. Modify 32-pin TSOP package L symbol dimensions. Finalize Add 36-ball Mini BGA (6X8) package

Features

n Power supply range: 3.6V n Access times:70/100 ns (max.) n Current: A62S6308-S series: Operating: 40mA (max.) Standby: 15ľA (max.) A62S6308-SI series: *Operating:40mA (max.) *Standby: 30ľA (max.) n Extended operating temperature C n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Output enable and two chip enable inputs for easy application n Data retention voltage: 2V (min.) n Available in 32-pin SOP, TSOP, sTSOP X 13.4mm) forward type and 36-ball Mini BGA (6X8) packages

The is a low operating current 524,288-bit static random access memory organized as 65,536 words by 8 bits and operates on a low power supply voltage from to 3.6V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two chip enable inputs are provided for POWER-DOWN and a device enable and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V.


Description Address Inputs Write Enable Chip Enable Power Supply No Connection Data Inputs/Outputs Ground Chip Enable Output Enable

Data Inputs/Outputs Ground Chip Enable Output Enable Write Enable Chip Enable Power Supply

 

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