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Details, datasheet, quote on part number: AD1845JP
 
 
Part numberAD1845JP
Category
DescriptionParallel-port 16-Bit Soundport Stereo Codec
CompanyAnalog Devices
DatasheetDownload AD1845JP datasheet
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Specifications, Features, Applications

FEATURES Single-Chip Integrated Digital Audio Stereo Codec Microsoft* and Windows* Sound System Compatible MPC Level-2+ Compliant Mixing 16 mA Bus Drive Capability Supports Two DMA Channels for Full Duplex Operation On-Chip Capture and Playback FIFOs Advanced Power-Down Modes Programmable Gain and Attenuation Sample Rates from 4.0 kHz to 50 kHz Derived from a Single Clock or Crystal Input 68-Lead PLCC, 100-Lead TQFP Packages Operation from +5 V Supplies Byte-Wide Parallel Interface to ISA and EISA Buses Pin Compatible with CS4248, CS4231 PRODUCT OVERVIEW

programmable gain, attenuation and mute, a variable sample frequency generator, FIFOs, and supports advanced powerdown modes. It provides a direct, byte-wide interface to both ISA ("AT") and EISA computer buses for simplified implementation on a computer motherboard or add-in card. The AD1845 SoundPort Stereo Codec supports a DMA request/grant architecture for transferring data with the host computer bus. One or two DMA channels can be supported. Programmed I/O (PIO) mode is also supported for control register accesses and for applications lacking DMA control. Two input control lines support mixed direct and indirect addressing of thirty-seven internal control registers over this asynchronous interface. The AD1845 includes dual DMA count registers for full duplex operation enabling the AD1845 to capture data on one DMA channel and play back data on a separate channel. The FIFOs on the AD1845 reduce the risk of losing data when making DMA transfers over the ISA/EISA bus. The FIFOs buffer data transfers and allow for relaxed timing in acknowledging requests for capture and playback data. External circuit requirements are limited to a minimal number of low cost support components. Anti-imaging DAC output filters are incorporated on-chip. Dynamic range exceeds 80 dB over the 20 kHz audio band. Sample rates from 4 kHz to 50 kHz are supported from a single external crystal or clock source. (Continued on Page 9)

The Parallel Port AD1845 SoundPort® Stereo Codec integrates key audio data conversion and control functions into a single integrated circuit. The AD1845 provides a complete, single chip computer audio solution for business audio and multimedia applications. The codec includes stereo audio converters, complete on-chip filtering, MPC Level-2 compliant analog mixing,

*Microsoft is a registered trademark of Microsoft Corporation. Windows is a trademark of Microsoft Corporation. SoundPort is a registered trademark of Analog Devices, Inc.

L_MIC R_MIC L_LINE R_LINE L_AUX1 R_AUX1 dB/ dB L GAIN R GAIN ANALOG SUPPLY DIGITAL SUPPLY CLOCK SOURCE POWER DOWN RESET

VARIABLE SAMPLE FREQUENCY GENERATOR A/D CONVERTER A/D CONVERTER
GAM = GAIN ATTENTUATE MUTE L ATTENUATE MUTE D/A CONVERTER
WR BUS DRIVER CONTROL HOST DMA INTERRUPT EXTERNAL CONTROL

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. © Analog Devices, Inc., 1996 One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703

STANDARD TEST CONDITIONS UNLESS OTHERWISE NOTED

Temperature Digital Supply (VDD) Analog Supply (VCC) Word Rate (FS) Input Signal Analog Output Passband ADC FFT Size DAC FFT Size VIH VIL

DAC Test Conditions Calibrated 0 dB Relative to Full Scale 16-Bit Linear Mode 10 k Output Load Mute Off, = 0 ADC Test Conditions Calibrated 0 dB Gain ­1.0 dB Relative to Full Scale Line Input 16-Bit Linear Mode Min Typ Max Units V rms V p-p V rms V p-p V rms V p-p k pF

Input Voltage (RMS Values Assume Sine Wave Input) Line 2.55 MIC with +20 dB Gain (MGE 1) 0.255 MIC with 0 dB Gain (MGE = 0) Input Impedance* Input Capacitance

Min Step Size (All Steps Tested) to 22.5 dB) PGA Gain Range Span 0.7 21.5
AUXILIARY LINE, MONO, AND MICROPHONE INPUT ANALOG GAIN/AMPLIFIERS/ATTENUATORS

Min Step Size AUX1, AUX2, LINE, MIC (All Steps Tested) to ­30 dB) to ­34.5 dB) Step Size: M_IN (All Steps Tested) to ­39 dB) to ­45 dB) Input Gain/Attenuation Range: AUX1, AUX2, LINE, MIC Input Gain/Attenuation Range: M_IN

Min Passband Ripple Transition Band Stopband Rejection Group Delay Group Delay Variation Over Passband

Min Resolution Dynamic Range (­60 dB Input, THD+N Referenced to Full Scale, A-Weighted) THD+N (Referenced to Full Scale) Signal-to-Intermodulation Distortion ADC Crosstalk* Line Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L) Line to MIC (Input LINE, Ground and Select MIC, Read ADC) Line to AUX1 Line to AUX2 Gain Error (Full-Scale Span Relative to Nominal Input Voltage) Interchannel Gain Mismatch (Difference of Gain Errors) ADC Offset Error

Min Resolution Dynamic Range (­60 dB Input, THD+N Referenced to Full Scale, A-Weighted) THD+N (Referenced to Full Scale) Signal-to-Intermodulation Distortion Gain Error (Full-Scale Span Relative to Nominal Output Voltage) Interchannel Gain Mismatch (Difference of Gain Errors) DAC Crosstalk* (Input L, Zero R, Measure R_OUT; Input R, Zero L, Measure L_OUT) Total Out-of-Band Energy (Measured from to 100 kHz)* Audible Out-of-Band Energy (Measured from to 20 kHz)*

Min Step Size to ­22.5 dB) Step Size to ­94.5 dB)* Output Attenuation Range Span*

Min Full-Scale Output Voltage = 1 Output Impedance* External Load Impedance Output Capacitance* External Load Capacitance VREF Current Drive VREF Output Impedance Mute Attenuation 0 dB Fundamental* (L_OUT, R_OUT, M_OUT) Mute Click (Muted Output Minus Unmuted Midscale DAC Output)*




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