|Category||Analog & Mixed-Signal Processing => Potentiometers|
|Description||Increment/decrement Dual Digital Potentiometer|
|Datasheet||Download AD522AD datasheet
|Cross ref.||Similar parts: INA101, PGA202, PGA203|
FEATURES 128-Position, 2-Channel Potentiometer Replacement 1 M Very Low Power: 40 A Max 2.7 V Dual Supply Operation 5.5 V Single Supply Operation Increment/Decrement Count Control APPLICATIONS Stereo Channel Audio Level Control Mechanical Potentiometer Replacement Remote Incremental Adjustment Applications Instrumentation: Gain, Offset Adjustment Programmable Voltage-to-Current Conversion Line Impedance Matching
The AD5222 provides a dual channel, 128-position, digitally controlled variable-resistor (VR) device. This device performs the same electronic adjustment function as a potentiometer or variable resistor. These products were optimized for instrument and test equipment push-button applications. Choices between bandwidth or power dissipation are available as a result of the wide selection of end-to-end terminal resistance values. The AD5222 contains two fixed resistors with wiper contacts that tap the fixed resistor value at a point determined by a digitally controlled up/down counter. The resistance between the wiper and either end point of the fixed resistor provides a constant resistance step size that is equal to the end-to-end resistance divided by the number of positions (e.g., R STEP = 78 The variable resistor offers a true adjustable value of resistance, between Terminal A and the wiper, or Terminal B and the wiper. The fixed A-to-B terminal resistance 1 M has a nominal temperature coefficient of 35 ppm/°C. The chip select CS, count CLK and U/D direction control inputs set the variable resistor position. The MODE determines whether both VRs are incremented together or independently. With MODE at logic zero, both wipers are incremented UP or DOWN without changing the relative settings between the wipers. Also, the relative ratio between the wipers is preserved if either wiper reaches the end of the resistor array. In the independent MODE (Logic 1) only the VR determined by the DACSEL pin is changed. DACSEL (Logic 0) changes RDAC 1. These inputs, which control the internal up/down counter, can be easily generated with
mechanical or push-button switches (or other contact closure devices). This simple digital interface eliminates the need for microcontrollers in front panel interface designs. The AD5222 is available in the surface-mount (SO-14) package. For ultracompact solutions, selected models are available in the thin TSSOP-14 package. All parts are guaranteed to operate over the extended industrial temperature range to +85°C. For 3-wire, SPI-compatible interface applications, see the AD5203/AD5204/AD5206, AD7376, and AD8400/AD8402/ AD8403 products.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999
DC CHARACTERISTICS RHEOSTAT MODE (Specifications Apply to All VRs) R-DNL RWB, = NC Resistor Differential NL2 Resistor Nonlinearity2 R-INL RWB, = NC Nominal Resistor Tolerance R VAB = VDD, Wiper = No Connect, = 25°C Resistance Temperature Coefficient RAB/T VAB = VDD, Wiper = No Connect Wiper IW = VDD /R, VDD 5 V Nominal Resistance Match R/RO AB = VDD, 25°C DC CHARACTERISTICS POTENTIOMETER DIVIDER MODE (Specifications Apply to All VRs) Resolution N INL RAB 100 k Integral Nonlinearity4 INL RAB 1 M Differential Nonlinearity4 DNL Voltage Divider Temperature Coefficient / T Code = 40H Full-Scale Error VWFSE Code 7F H Zero-Scale Error VWZSE Code = 00H RESISTOR TERMINALS Voltage Range Capacitance6 W Common-Mode Leakage DIGITAL INPUTS AND OUTPUTS Input Logic High Input Logic Low Input Current Input Capacitance6 POWER SUPPLIES Power Single-Supply Range Power Dual-Supply Range Positive Supply Current Negative Supply Current Power Dissipation 7 Power Supply Sensitivity DYNAMIC 8, 9 Bandwidth 3 dB VA, B, W CA, B CW ICM VIH VIL IIL CIL VDD RANGE VDD/SS RANGE IDD ISS PDISS PSS BW_100K BW_1M THDW tS eN_WB
= 1 MHz, Measured to GND, Code = 40 MHz, Measured to GND, Code H VA VDD V/3 V VDD V/3 V VIN V 2.4/2.1Total Harmonic Distortion VW Settling Time Resistor Noise Voltage
INTERFACE TIMING CHARACTERISTICS (Applies to All Parts) 6, 10 Input Clock Pulsewidth tCH, t CL Clock Level High or Low CS to CLK Setup Time tCSS CS Rise to CLK Hold Time tCSH U/D to Clock Fall Setup Time tUDS U/D to Clock Fall Hold Time tUDH DACSEL to Clock Fall Setup Time tDSS DACSEL to Clock Fall Hold Time tDSH MODE to Clock Fall Setup Time tMDS MODE to Clock Fall Hold Time tMDH
NOTES 1Typicals represent average readings at 25 °C, V. 2Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See Figure 22 test circuit. 3Wiper resistance is not measured on the 1 M models. 4INL and DNL are measured at V with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. DD and 0 V. DNL specification limits ± 1 LSB maximum are guaranteed monotonic operating conditions. See Figure 21 test circuit. 5Resistor Terminals B, W have no limitations on polarity with respect to each other. 6Guaranteed by design and not subject to production test. 7P DISS is calculated from × V DD). CMOS logic level inputs result in minimum power dissipation. 8Bandwidth, noise and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest bandwidth. The highest R value results in the minimum overall power consumption. 9All dynamic characteristics use V. 10See timing diagram for location of measured values. All input control voltages are specified with +3 V) and timed from a voltage level 1.5 V. Switching characteristics are measured using both 3 V. Specifications subject to change without notice.ORDERING GUIDE Kilo Package Ohms Temperature Description Option R-14 RU-14
VDD to GND. +7 V VSS to GND. 5 V VDD to VSS. 7 V VA, VB, W to GND. 0 V, VDD BX WX. 20 mA Digital Input Voltage to GND. 0 V, VDD 0.3 V Operating Temperature Range. to +85°C Maximum Junction Temperature (TJ max). 150°C Storage Temperature. to +150°C Lead Temperature (Soldering, 10 sec). 300°C Package Power Dissipation. (TJ max TA)/JA Thermal Resistance JA, SOIC TSSOP-14. 206°C/W
The AD5222 die size is 56 mil × 60 mil, 3360 sq. mil; × 1.524 mm, 2.1677 sq. mm. Contains 1503 transistors. Patent Number 5495245 applies.Description
Operation Wiper Increment Toward Terminal A Wiper Decrement Toward Terminal B Wiper Position Fixed
Common Mode (MODE = 0) moves both wipers together either UP or DOWN the resistor array without changing the relative distance between the wipers. Also, the distance between both wipers is preserved if either reaches the end of the array. Independent Mode (MODE = 1) allows user to control each RDAC individually: DACSEL = 0 sets RDAC1; DACSEL = 1: sets RDAC2.
B Terminal RDAC #1. A Terminal RDAC #1. Wiper RDAC #1, DACSEL = 0. Negative Power Supply. Specified for operation at both 2.7 V (Sum of |VDD | + |VSS < 5.5 V). W2 Wiper RDAC #2, DACSEL A2 A Terminal RDAC B2 B Terminal RDAC #2. GND Ground. MODE Common MODE = 0, Independent MODE = 1. DACSEL DAC Select determines which wiper is incremented in the Independent MODE = 1. DACSEL = 0 sets RDAC1, DACSEL = 1 sets RDAC2. U/D UP/DOWN Direction Control. CLK Serial Clock Input, Negative Edge Triggered. CS Chip Select Input, Active Low. When CS is high, the UP/DOWN counter is disabled. VDD Positive Power Supply. Specified for operation at both +5 V. (Sum of |VDD | + |VSS < 5.5 V).
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD5222 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
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