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Details, datasheet, quote on part number:AD534KCHIP
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Datasheet text preview:
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FEATURES Pretrimmed to 0.25% max 4-Quadrant Error (AD534L) All Inputs (X, Y and Z) Differential, High Impedance for [(X1 X 2) (Y 1 Y 2 )/10 V] + Z2 Transfer Function Scale-Factor Adjustable to Provide up to X100 Gain Low Noise Design: 90 V rms, 10 Hz10 kHz Low Cost, Monolithic Construction Excellent Long Term Stability APPLICATIONS High Quality Analog Signal Processing Differential Ratio and Percentage Computations Algebraic and Trigonometric Function Synthesis Wideband, High-Crest rms-to-dc Conversion Accurate Voltage Controlled Oscillators and Filters Available in Chip Form PRODUCT DESCRIPTION
X1 X2
Internally Trimmed Precision IC Multiplier AD534
PIN CONFIGURATIONS TO-100 (H-10A) Package TO-116 (D-14) Package
X1 1 X2 2 SF
14 +VS 13 NC
+VS OUT
AD534
TOP VIEW (Not To Scale)
NC 3 SF 4
AD534
12 OUT
Y1 Y2 VS Z2
Z1
TOP VIEW 11 Z1 (Not to Scale) 10 Z2 NC 5 Y1 6 Y2 7
9 8
NC VS
NC = NO CONNECT
LCC (E-20A) Package
NC +VS NC X2 3 X1
The AD534 is a monolithic laser trimmed four-quadrant multiplier divider having accuracy specifications previously found only in expensive hybrid or modular products. A maximum multiplication error of ± 0.25% is guaranteed for the AD534L without any external trimming. Excellent supply rejection, low temperature coefficients and long term stability of the on-chip thin film resistors and buried Zener reference preserve accuracy even under adverse conditions of use. It is the first multiplier to offer fully differential, high impedance operation on all inputs, including the Z-input, a feature which greatly increases its flexibility and ease of use. The scale factor is pretrimmed to the standard value of 10.00 V; by means of an external resistor, this can be reduced to values as low as 3 V. The wide spectrum of applications and the availability of several grades commend this multiplier as the first choice for all new designs. The AD534J (± 1% max error), AD534K (± 0.5% max) and AD534L (± 0.25% max) are specified for operation over the 0°C to +70°C temperature range. The AD534S (±1% max) and AD534T (± 0.5% max) are specified over the extended temperature range, 55°C to +125°C. All grades are available in hermetically sealed TO-100 metal cans and TO-116 ceramic DIP packages. AD534J, K, S and T chips are also available.
PROVIDES GAIN WITH LOW NOISE
2
1
20 19
NC 4 NC 5 SF 6 NC 7 NC 8
18 OUT
AD534
TOP VIEW (Not To Scale)
17 NC 16 Z1 15 NC 14 Z2
9 Y1
10 Y2
11 12 13 VS NC NC
NC = NO CONNECT
such as those used to generate sine and tangent. The utility of this feature is enhanced by the inherent low noise of the AD534: 90 µV, rms (depending on the gain), a factor of 10 lower than previous monolithic multipliers. Drift and feedthrough are also substantially reduced over earlier designs.
UNPRECEDENTED FLEXIBILITY
The AD534 is the first general purpose multiplier capable of providing gains up to X100, frequently eliminating the need for separate instrumentation amplifiers to precondition the inputs. The AD534 can be very effectively employed as a variable gain differential input amplifier with high common-mode rejection. The gain option is available in all modes, and will be found to simplify the implementation of many function-fitting algorithms
The precise calibration and differential Z-input provide a degree of flexibility found in no other currently available multiplier. Standard MDSSR functions (multiplication, division, squaring, square-rooting) are easily implemented while the restriction to particular input/output polarities imposed by earlier designs has been eliminated. Signals may be summed into the output, with or without gain and with either a positive or negative sense. Many new modes based on implicit-function synthesis have been made possible, usually requiring only external passive components. The output can be in the form of a current, if desired, facilitating such operations as integration.
REV. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999
AD534SPECIFICATIONS (@ T = + 25 C,
A
VS = 15 V, R 2 k )
Max Min AD534K Typ Max Min AD534L Typ Max Units
Model Min MULTIPLIER PERFORMANCE Transfer Function Total Error 1 (10 V X, Y +10 V) TA = min to max Total Error vs. Temperature Scale Factor Error (SF = 10.000 V Nominal) 2 Temperature-Coefficient of Scaling Voltage Supply Rejection (± 15 V ± 1 V) Nonlinearity, X (X = 20 V p-p, Y = 10 V) Nonlinearity, Y (Y = 20 V p-p, X = 10 V) Feedthrough 3, X (Y Nulled, X = 20 V p-p 50 Hz) Feedthrough 3, Y (X Nulled, Y = 20 V p-p 50 Hz) Output Offset Voltage Output Offset Voltage Drift DYNAMICS Small Signal BW (V OUT = 0.1 rms) 1% Amplitude Error (CLOAD = 1000 pF) Slew Rate (V OUT 20 p-p) Settling Time (to 1%, VOUT = 20 V) NOISE Noise Spectral-Density SF = 10 V SF = 3 V4 Wideband Noise f = 10 Hz to 5 MHz Wideband Noise f = 10 Hz to 10 kHz OUTPUT Output Voltage Swing Output Impedance (f 1 kHz) Output Short Circuit Current (R L = 0, T A = min to max) Amplifier Open Loop Gain (f = 50 Hz) INPUT AMPLIFIERS (X, Y and Z) 5 Signal Voltage Range (Diff. or CM Operating Diff.) Offset Voltage X, Y Offset Voltage Drift X, Y Offset Voltage Z Offset Voltage Drift Z CMRR Bias Current Offset Current Differential Resistance DIVIDER PERFORMANCE Transfer Function (X1 > X2) Total Error 1 (X = 10 V, 10 V Z +10 V) (X = 1 V, 1 V Z +1 V) (0.1 V X 10 V, 10 V Z 10 V) SQUARE PERFORMANCE Transfer Function Total Error (10 V X 10 V) SQUARE-ROOTER PERFORMANCE Transfer Function (Z 1 Z2) Total Error 1 (1 V Z 10 V) POWER SUPPLY SPECIFICATIONS Supply Voltage Rated Performance Operating Supply Current Quiescent PACKAGE OPTIONS TO-100 (H-10A) TO-116 (D-14) Chips N OTES
1
AD534J Typ
( X1 X 2 )(Y1 Y 2 ) + Z2 10 V
( X1 X 2 )(Y1 Y 2 ) + Z2 10 V
( X1 X 2 )(Y1 Y 2 ) + Z2 10 V
± 1.5 ± 0.022 ± 0.25 ± 0.02 ± 0.01 ± 0.4 ± 0.2 ± 0.3 ± 0.01 ±5 200 1 50 20 2 0.8 0.4 1 90 11 0.1 30 70 ± 10 ± 12 ±5 100 ±5 200 80 0.8 0.1 10
( Z 2 - Z1 ) + Y1 ( X1 - X 2 )
1.0
± 1.0 ± 0.015 ± 0.1 ± 0.01 ± 0.01 ± 0.2 ± 0.1 ± 0.15
0.5
± 0.5 ± 0.008 ± 0.1 ± 0.005 ± 0.01 ± 0.10 ± 0.005 ± 0.05 ± 0.003 ±2 100 1 50 20 2 0.8 0.4 1 90 11
0.25
% % %/ ° C % %/ ° C % % % % % mV µV/°C MHz kHz V/µs µs µV/Hz µV/Hz mV/rms µV/rms V mA dB V V mV µV/°C mV µV/°C dB µA µA M
0.3 0.1 0.3 0.1 15
0.12 0.1 0.12 0.1 10
30
± 0.01 ±2 100 1 50 20 2 0.8 0.4 1 90 11 0.1 30 70 ± 10 ± 12 ±2 50 ±2 100 90 0.8 0.1 10
( Z 2 - Z1 ) + Y1 ( X1 - X 2 )
0.1 30 70 ± 10 ± 12 ±2 50 ±2 100 90 0.8 0.05 10
( Z 2 - Z1 ) + Y1 ( X1 - X 2 )
20 30 70 2.0
10 15 70 2.0
10
± 10
2.0 0.2
60
10 V
10 V
10 V
± 0.75 ± 2.0 ± 2.5
( X1 - X 2 )2 + Z2 10 V
± 0.35 ± 1.0 ± 1.0
( X1 - X 2 )2 + Z2 10 V
± 0.2 ± 0.8 ± 0.8
( X1 - X 2 )2 + Z2 10 V
% % %
± 0.6
10 V ( Z 2 - Z1 ) + X 2
± 0.3
10 V ( Z 2 - Z1 ) + X 2
± 0.2
10 V ( Z 2 - Z1 ) + X 2
%
± 1.0 ± 15 4 AD534JH AD534JD 6
± 0.5 ± 15 4 AD534KH AD534KD AD534K Chips 6
± 0.25 ± 15 4 6 AD534LH AD534LD
%
±8
18
±8
18
±8
18
V V mA
Figures given are percent of full scale, ± 10 V (i.e., 0.01% = 1 mV). 2 May be reduced down to 3 V using external resistor between V S and SF. 3 Irreducible component due to nonlinearity: excludes effect of offsets. 4 Using external resistor adjusted to give SF = 3 V. 5 See Functional Block Diagram for definition of sections. Specifications subject to change without notice.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
2
REV. B
AD534
Model Min MULTIPLIER PERFORMANCE Transfer Function Total Error1 (10 V X, Y +10 V) TA = min to max Total Error vs. Temperature Scale Factor Error (SF = 10.000 V Nominal)2 Temperature-Coefficient of Scaling Voltage Supply Rejection (±15 V ± 1 V) Nonlinearity , X (X = 20 V p-p, Y = 10 V) Nonlinearity, Y (Y = 20 V p-p, X = 10 V) Feedthrough 3, X (Y Nulled, X = 20 V p-p 50 Hz) Feedthrough 3, Y (X Nulled, Y = 20 V p-p 50 Hz) Output Offset Voltage Output Offset Voltage Drift DYNAMICS Small Signal BW (VOUT = 0.1 rms) 1% Amplitude Error (CLOAD = 1000 pF) Slew Rate (VOUT 20 p-p) Settling Time (to 1%, VOUT = 20 V) NOISE Noise Spectral-Density SF = 10 V SF = 3 V 4 Wideband Noise f = 10 Hz to 5 MHz Wideband Noise f = 10 Hz to 10 kHz OUTPUT Output Voltage Swing Output Impedance (f 1 kHz) Output Short Circuit Current (RL = 0, TA = min to max) Amplifier Open Loop Gain (f = 50 Hz) INPUT AMPLIFIERS (X, Y and Z) 5 Signal Voltage Range (Diff. or CM Operating Diff.) Offset Voltage X, Y Offset Voltage Drift X, Y Offset Voltage Z Offset Voltage Drift Z CMRR Bias Current Offset Current Differential Resistance DIVIDER PERFORMANCE Transfer Function (X1 > X2) Total Error1 (X = 10 V, 10 V Z +10 V) (X = 1 V, 1 V Z +1 V) (0.1 V X 10 V, 10 V Z 10 V) SQUARE PERFORMANCE Transfer Function Total Error (10 V X 10 V) SQUARE-ROOTER PERFORMANCE Transfer Function (Z1 Z2 ) Total Error1 (1 V Z 10 V) POWER SUPPLY SPECIFICATIONS Supply Voltage Rated Performance Operating Supply Current Quiescent PACKAGE OPTIONS TO-100 (H-10A) TO-116 (D-14) E-20A Chips N OTES
1 2 3
AD534S Typ
Max
Min
AD534T Typ
Max
Units
( X1 X 2 )(Y1 Y 2 ) + Z2 10 V
( X1 X 2 )(Y1 Y 2 ) + Z2 10 V
1.0 2.0 0.02 ± 0.25 ± 0.02 ± 0.01 ± 0.4 ± 0.2 ± 0.3 ± 0.01 ±5
± 1.0 ± 0.1 ± 0.01 ± 0.2 ± 0.1 ± 0.15
0.5 0.01
% % %/°C %
0.005 0.3 0.1 0.3 0.1 15 300
%/°C % % % % % mV µV/°C MHz kHz V/µs µs µV/Hz µV/Hz mV/rms µV/rms V mA dB V V mV µV/°C mV µV/°C dB µA µA M
± 30
500
± 0.01 ±2
1 50 20 2 0.8 0.4 1.0 90
1 50 20 2 0.8 0.4 1.0 90
± 11
0.1 30 70 ± 10 ± 12 ±5 100 ±5 60 80 0.8 0.1 10
( Z 2 - Z1 ) + Y1 ( X1 - X 2 )
± 11
0.1 30 70 ± 10 ± 12 ±2 150 ±2 70 2.0 90 0.8 0.1 10
( Z 2 - Z1 ) + Y1 ( X1 - X 2 )
20 30 500
10 15 300 2.0
10 V
10 V
± 0.75 ± 2.0 ± 2.5
( X1 - X 2 )2 + Z2 10 V
± 0.35 ± 1.0 ± 1.0
( X1 - X 2 )2 + Z2 10 V
% % %
± 0.6
10 V ( Z 2 - Z1 ) + X 2
± 0.3
10 V ( Z 2 - Z1 ) + X 2
%
± 1.0 ± 15 4 AD534SH AD534SD AD534SE AD534S Chips 6
± 0.5 ± 15 4 AD534TH AD534TD AD534T Chips 6
%
±8
22
±8
22
V V mA
Figures given are percent of full scale, ± 10 V (i.e., 0.01% = 1 mV). May be reduced down to 3 V using external resistor between V S and SF. Irreducible component due to nonlinearity: excludes effect of offsets. 4 Using external resistor adjusted to give SF = 3 V. 5 See Functional Block Diagram for definition of sections. Specifications subject to change without notice.
Specifications shown in boldface are tested on all production units at final electrical
test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
REV. B
3
AD534
CHIP DIMENSIONS AND BONDING DIAGRAM
Dimensions shown in inches and (mm). Contact factory for latest dimensions.
X1 X2 +VS OUT
ABSOLUTE MAXIMUM RATINGS
AD534J, K, L Supply Voltage Internal Power Dissipation Output Short-Circuit to Ground Input Voltages, X1 X2 Y 1 Y 2 Z 1 Z 2 Rated Operating Temperature Range ± 18 V 500 mW Indefinite ± VS 0°C to +70°C AD534S, T ± 22 V * * * 55°C to +125°C 65°C to +150°C * +300°C *
SF
0.076 (1.93) Z1
Storage Temperature Range Lead Temperature Range, 60 s Soldering
*Same as AD534J Specs.
+VS Y1 Y2 0.100 (2.54) THE AD534 IS AVAILABLE IN LASER - TRIMMED CHIP FORM VS Z2
5
470k 0k
1 k
O APPROPRIATE INPUT TERMINAL T
Thermal Characteristics
VS
Thermal Resistance JC = 25°C/W for H-10A JA = 150°C/W for H-10A JC = 25°C/W for D-14 or E-20A JA = 95°C/W for D-14 or E-20A
Figure 1. Optional Trimming Configuration
ORDERING GUIDE
Model AD534JD AD534KD AD534LD AD534JH AD534JH/+ AD534KH AD534KH/+ AD534LH AD534K Chip AD534SD AD534SD/883B AD534TD AD534TD/883B JM38510/13902BCA JM38510/13901BCA AD534SE AD534SE/883B AD534TE/883B AD534SH AD534SH/883B AD534TH AD534TH/883B JM38510/13902BIA JM38510/13901BIA AD534S Chip AD534T Chip
Temperature Range 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C 55°C to +125°C
Package Description Side Brazed DIP Side Brazed DIP Side Brazed DIP Header Header Header Header Header Chip Side Brazed DIP Side Brazed DIP Side Brazed DIP Side Brazed DIP Side Brazed DIP Side Brazed DIP LCC LCC LCC Header Header Header Header Header Header Chip Chip
Package Option D-14 D-14 D-14 H-10A H-10A H-10A H-10A H-10A D-14 D-14 D-14 D-14 D-14 D-14 E-20A E-20A E-20A H-10A H-10A H-10A H-10A H-10A H-10A
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD534 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
4
REV. B
AD534
FUNCTIONAL DESCRIPTION
Figure 2 is a functional block diagram of the AD534. Inputs are converted to differential currents by three identical voltage-tocurrent converters, each trimmed for zero offset. The product of the X and Y currents is generated by a multiplier cell using Gilbert's translinear technique. An on-chip "Buried Zener" provides a highly stable reference, which is laser trimmed to provide an overall scale factor of 10 V. The difference between XY/SF and Z is then applied to the high gain output amplifier. This permits various closed loop configurations and dramatically reduces nonlinearities due to the input amplifiers, a dominant source of distortion in earlier designs. The effectiveness of the new scheme can be judged from the fact that under typical conditions as a multiplier the nonlinearity on the Y input, with X at full scale (± 10 V), is ± 0.005% of FS; even at its worst point, which occurs when X = ±6.4 V, it is typically only ± 0.05% of FS Nonlinearity for signals applied to the X input, on the other hand, is determined almost entirely by the multiplier element and is parabolic in form. This error is a major factor in determining the overall accuracy of the unit and hence is closely related to the device grade.
AD534
SF STABLE REFERENCE AND BIAS +VS VS TRANSFER FUNCTION X1 X2 Y1 Y2 Z1 Z2 + V-1 (X1 X2) (Y1 Y2) SF
The user may adjust SF for values between 10.00 V and 3 V by connecting an external resistor in series with a potentiometer between SF and VS. The approximate value of the total resistance for a given value of SF is given by the relationship:
RSF = 5. 4 K SF 10 - SF
Due to device tolerances, allowance should be made to vary RSF; by ± 25% using the potentiometer. Considerable reduction in bias currents, noise and drift can be achieved by decreasing SF. This has the overall effect of increasing signal gain without the customary increase in noise. Note that the peak input signal is always limited to 1.25 SF (i.e., ± 5 V for SF = 4 V) so the overall transfer function will show a maximum gain of 1.25. The performance with small input signals, however, is improved by using a lower SF since the dynamic range of the inputs is now fully utilized. Bandwidth is unaffected by the use of this option. Supply voltages of ± 15 V are generally assumed. However, satisfactory operation is possible down to ± 8 V (see Figure 16). Since all inputs maintain a constant peak input capability of ± 1.25 SF some feedback attenuation will be necessary to achieve output voltage swings in excess of ± 12 V when using higher supply voltages.
OPERATION AS A MULTIPLIER
+ V-1
TRANSLINEAR MULTIPLIER ELEMENT
VO = A
(Z1 Z2)
Figure 3 shows the basic connection for multiplication. Note that the circuit will meet all specifications without trimming.
X INPUT 10V FS 12V PK X1 X2 OUT = SF Z1 +VS +15V OUTPUT , 12V PK (X1 X2) (Y1 Y2) + Z2 10V
A HIGH GAIN OUTPUT AMPLIFIER
OUT
+ V-1
0.75 ATTEN
Figure 2. Functional Block Diagram
AD534
Z2 Y INPUT 10V FS 12V PK Y1 Y2 VS 15V
OPTIONAL SUMMING INPUT, Z, 10V PK
The generalized transfer function for the AD534 is given by: ( X - X 2 ) (Y1 - Y 2 ) V OUT = A 1 - ( Z1 - Z2 ) SF where A = open loop gain of output amplifier, typically 70 dB at dc X, Y, Z = input voltages (full scale = ± SF, peak = ± 1.25 SF) SF = scale factor, pretrimmed to 10.00 V but adjustable by the user down to 3 V. In most cases the open loop gain can be regarded as infinite, and SF will be 10 V. The operation performed by the AD534, can then be described in terms of equation:
Figure 3. Basic Multiplier Connection
In some cases the user may wish to reduce ac feedthrough to a minimum (as in a suppressed carrier modulator) by applying an external trim voltage (± 30 mV range required) to the X or Y input (see Figure 1). Figure 19 shows the typical ac feedthrough with this adjustment mode. Note that the Y input is a factor of 10 lower than the X input and should be used in applications where null suppression is critical. The high impedance Z2 terminal of the AD534 may be used to sum an additional signal into the output. In this mode the output amplifier behaves as a voltage follower with a 1 MHz small signal bandwidth and a 20 V/µs slew rate. This terminal should always be referenced to the ground point of the driven system, particularly if this is remote. Likewise, the differential inputs should be referenced to their respective ground potentials to realize the full accuracy of the AD534.
( X1 - X 2 ) (Y1 - Y 2 ) = 10 V ( Z1 - Z2 )
REV. B
5
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