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Part: AD5554
Category:
Data Conversion
-> DAC (Digital to Analog Converters)
-> 10-14 bit
Description: Precision Quad 14-Bit DAC
Company: Analog Devices
Datasheet: Download AD5554 datasheet File size : 54 kB
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Datasheet text preview:
a
FEATURES AD5544 16-Bit Resolution AD5554 14-Bit Resolution 2 mA Full-Scale Current 20%, with VREF = 10 V 2 s Settling Time V SS BIAS for Zero-Scale Error Reduction @ Temp Midscale or Zero-Scale Reset Four Separate 4Q Multiplying Reference Inputs SPI-Compatible 3-Wire Interface Double Buffered Registers Enable Simultaneous Multichannel Change Internal Power ON Reset Compact SSOP-28 Package APPLICATIONS Automatic Test Equipment Instrumentation Digitally-Controlled Calibration
Quad, Current-Output Serial-Input, 16-Bit/14-Bit DACs AD5544/AD5554
FUNCTIONAL BLOCK DIAGRAM
VREF A B C D
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 A0 A1 VDD RFBA INPUT REGISTER R DAC A REGISTER R DAC A IOUTA AGNDA RFBB 16 INPUT REGISTER R DAC B REGISTER R DAC B IOUTB AGNDB RFBC INPUT REGISTER R DAC C REGISTER R DAC C IOUTC AGNDC CS CLK EN DAC A B C D 2:4 DECODE INPUT REGISTER R DAC D REGISTER R DAC D RFBD IOUTD AGNDD POWERON RESET
SDO
SDI
AD5544
AGNDF
DGND
RS
MSB
LDAC
VSS
GENERAL DESCRIPTION
The AD5544/AD5554 quad, 16-/14-bit, current-output, digitalto-analog converters are designed to operate from a single 5 V supply. The applied external reference input voltage (VREF) determines the full-scale output current. Integrated feedback resistors (RFB) provide temperature-tracking, full-scale voltage outputs when combined with an external I-to-V precision amplifier. A doubled-buffered serial-data interface offers high-speed, 3-wire, SPI- and microcontroller-compatible inputs using serial-data-in (SDI), clock (CLK), and a chip-select (CS). In addition, a serial-data-out pin (SDO) allows for daisy-chaining when multiple packages are used. A common level-sensitive load-DAC strobe (LDAC) input allows simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power ON reset forces the output voltage to zero at system turn ON. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to half-scale code when MSB = 1. AD5544/AD5554 are packaged in the compact SSOP-28.
1.0 0.5 0.0 0.5 1.0 1.0 0.5 0.0
INL LSB
DAC A
DAC B
0.5 1.0 1.0 0.5 0.0 0.5 1.0 1.0 0.5 0.0 0.5 1.0 0 8192 16384 24576 32768 40960 49152 57344 65536 CODE Decimal
DAC C
DAC D
Figure 1. AD5544 INL vs. Code Plot (TA = 25°C)
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000
5 10%, 0 I X= X= AD5544/AD5554SPECIFICATIONS (V@ VA, B,=C, VD = 10 V, TV ==FullV,OperatingVirtual GND, A Range,0 V, Temperature
DD SS OUT GND
AD5544 ELECTRICAL CHARACTERISTICS
Parameter STATIC PERFORMANCE Resolution Relative Accuracy Differential Nonlinearity Output Leakage Current Full-Scale Gain Error Full-Scale Tempco2 Feedback Resistor REFERENCE INPUT VREFX Range Input Resistance Input Resistance Match Input Capacitance2 ANALOG OUTPUT Output Current Output Capacitance2 LOGIC INPUTS AND OUTPUT Logic Input Low Voltage Logic Input High Voltage Input Leakage Current Input Capacitance2 Logic Output Low Voltage Logic Output High Voltage INTERFACE TIMING Clock Width High Clock Width Low CS to Clock Setup Clock to CS Hold Clock to SDO Prop Delay Load DAC Pulsewidth Data Setup Data Hold Load Setup Load Hold SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current Negative Supply Current Power Dissipation Power Supply Sensitivity
2, 3 1
REF
A
unless otherwise noted.)
Min Typ Max 16 ±4 ± 1.5 10 20 ±3 8 +15 8 Unit Bits LSB LSB nA nA mV p p m /° C k V k % pF mA pF V V µA pF V V ns ns ns ns ns ns ns ns ns ns V µA µA mW %/%
Symbol N INL DNL IO U T X IOUT X GFSE T C VF S RFBX V REFX R REFX R REFX CREFX IOUT X COUT X V IL V IH II L CIL V OL V OH tCH tCL tCSS tCSH tPD tLDAC tDS tDH tLDS tLDH VDD RANGE IDD IS S P DISS PSS
Condition 1 LSB = VREF/216 = 153 µV when VREF = 10 V Data = 0000H, TA = 25°C Data = 0000H, TA = TA Max Data = FFFFH V DD = 5 V
4 15 4
± 0.75 1 6
Channel-to-Channel
6 1 5
Data = FFFFH Code-Dependent
1.25 80
2.5
0.8 2.4 1 10 0.4 4 25 25 0 25 2 25 20 20 5 25 4.5 Logic Inputs = 0 V Logic Inputs = 0 V, VSS = 5 V Logic Inputs = 0 V VDD = ± 5% 50 0.001
IOL = 1.6 mA IOH = 100 µA
20
5.5 250 1 1.25 0.006
NOTES 1 All static performance tests (except I OUT) are performed in a closed-loop system using an external precision OP177 I-to-V converter amplifier. The AD5544 RFB terminal is tied to the amplifier output. Typical values represent average readings measured at 25 °C. 2 These parameters are guaranteed by design and not subject to production testing. 3 All input control signals are specified with t R = t F = 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V. Specifications subject to change without notice.
2
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AD5544/AD5554 AD5544 ELECTRICAL CHARACTERISTICS
Parameter
1
(@ VDD = 5 V 10%, VSS = 300 mV, IOUTX = Virtual GND, AGNDX = 0 V, VREFA, B, C, D = 10 V, TA = full operating temperature range, unless otherwise noted.)
Min Typ Max Unit 1 2 2 1.2 65 90 5 90 7 µs µs MHz nV-s dB dB nV-s dB nV/ H z
Symbol
Condition
AC CHARACTERISTICS Output Voltage Settling Time tS
To ± 0.1% of Full Scale, Data = 0000H to FFFFH to 0000H Output Voltage Settling Time tS To ± 0.0015% of Full Scale, Data = 0000H to FFFFH to 0000H Reference Multiplying BW BW 3 dB VREFX = 100 mV rms, Data = FFFFH, CFB = 15 pF DAC Glitch Impulse Q VREFX = 10 V, Data 0000H to 8000H to 0000H Feedthrough Error VOUTX/VREFX Data = 0000H, VREFX = 100 mV rms, f = 100 kHz Crosstalk Error VOUTA/VREFB Data = 0000H, VREFB = 100 mV rms, Adjacent Channel, f = 100 kHz Digital Feedthrough Q CS = 1, and fCLK = 1 MHz Total Harmonic Distortion THD VREF = 5 V p-p, Data = FFFFH, f = 1 kHz Output Spot Noise Voltage eN f = 1 kHz, BW = 1 Hz
NOTES 1 All ac characteristic tests are performed in a closed-loop system using an OP42 I-to-V converter amplifier. Specifications subject to change without notice.
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3
AD5544/AD5554SPECIFICATIONS
AD5554 ELECTRICAL CHARACTERISTICS
Parameter STATIC PERFORMANCE Resolution Relative Accuracy Differential Nonlinearity Output Leakage Current Full-Scale Gain Error Full-Scale Tempco2 Feedback Resistor REFERENCE INPUT VREFX Range Input Resistance Input Resistance Match Input Capacitance2 ANALOG OUTPUT Output Current Output Capacitance2 LOGIC INPUTS AND OUTPUT Logic Input Low Voltage Logic Input High Voltage Input Leakage Current Input Capacitance2 Logic Output Low Voltage Logic Output High Voltage INTERFACE TIMING Clock Width High Clock Width Low CS to Clock Setup Clock to CS Hold Clock to SDO Prop Delay Load DAC Pulsewidth Data Setup Data Hold Load Setup Load Hold SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current Negative Supply Current Power Dissipation Power Supply Sensitivity
2, 3 1
(@ VDD = 5 V 10%, VSS = 0 V, IOUTX = Virtual GND, AGNDX = 0 V, VREFA, B, C, D = 10 V, TA = full operating temperature range, unless otherwise noted.)
Min Typ Max 14 ±1 ±1 10 20 ± 10 8 +15 8 Unit Bits LSB LSB nA nA mV p p m /° C k V k % pF mA pF V V µA pF V V ns ns ns ns ns ns ns ns ns ns V µA µA mW %/%
Symbol N INL DNL IOUTX IOUTX GFSE T C VF S RFBX V REFX RREFX RREFX CREFX IOUTX COUTX V IL V IH II L CIL V OL V OH tCH tCL tCSS tCSH tPD tLDAC tDS tDH tLDS tLDH VDD RANGE IDD IS S PD I S S PSS
Condition 1 LSB = VREF/214 = 610 µV when VREF = 10 V Data = 0000H, TA = 25°C Data = 0000H, TA = TA Max Data = 3FFFH VDD = 5 V
4 15 4
±2 1 6
Channel-to-Channel
6 1 5
Data = 3FFFH Code-Dependent
1.25 80
2.5
0.8 2.4 1 10 0.4 4 25 25 0 25 2 25 20 20 5 25 4.5 Logic Inputs = 0 V Logic Inputs = 0 V, VSS = 5 V Logic Inputs = 0 V VDD = ± 5% 50 0.001
IOL = 1.6 mA IOH = 100 µA
20
5.5 250 1 1.25 0.006
NOTES: 1 All static performance tests (except I OUT) are performed in a closed-loop system using an external precision OP177 I-to-V converter amplifier. The AD5554 RFB terminal is tied to the amplifier output. Typical values represent average readings measured at 25 °C. 2 These parameters are guaranteed by design and not subject to production testing. 3 All input control signals are specified with t R = tF = 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V. Specifications subject to change without notice.
4
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AD5544/AD5554 AD5554 ELECTRICAL CHARACTERISTICS
Parameter
1
(@ VDD = 5 V 10%, VSS = 300 mV, IOUTX = Virtual GND, AGNDX = 0 V, VREFA, B, C, D = 10 V, TA = full operating temperature range, unless otherwise noted.)
Min Typ Max Unit 1 2 2 1.2 65 90 5 90 7 µs µs MHz nV-s dB dB nV-s dB nV/ H z
Symbol
Condition
AC CHARACTERISTICS Output Voltage Settling Time tS
To ± 0.1% of Full Scale, Data = 0000H to 3FFFH to 0000H Output Voltage Settling Time tS To ± 0.0015% of Full Scale, Data = 0000H to 3FFFH to 0000H Reference Multiplying BW BW 3 dB VREFX = 100 mV rms, Data = 3FFFH, CFB = 15 pF DAC Glitch Impulse Q VREFX = 10 V, Data 0000H to 2000H to 0000H Feedthrough Error VOUTX/VREFX Data = 0000H, VREFX = 100 mV rms, f = 100 kHz Crosstalk Error VOUTA/VREFB Data = 0000H, VREFB = 100 mV rms, Adjacent Channel, f = 100 kHz Digital Feedthrough Q CS = 1, and fCLK = 1 MHz Total Harmonic Distortion THD VREF = 5 V p-p, Data = 3FFFH, f = 1 kHz Output Spot Noise Voltage eN f = 1 kHz, BW = 1 Hz
NOTES: 1 All ac characteristic tests are performed in a closed-loop system using an OP42 I-to-V converter amplifier. Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V, +8 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V, 7 V VREF to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V, +18 V Logic Inputs and Output to GND . . . . . . . . . . . . 0.3 V, +8 V V(IOUT) to GND . . . . . . . . . . . . . . . . . . . . 0.3 V, VDD + 0.3 V AGNDX to DGND . . . . . . . . . . . . . . . . . . . . . . 0.3 V, + 0.3 V Input Current to Any Pin Except Supplies . . . . . . . . . ± 50 mA Package Power Dissipation . . . . . . . . . . . . (TJ MAX TA)/JA Thermal Resistance JA 28-Lead Shrink Surface-Mount (RS-28) . . . . . . . . 100°C/W Maximum Junction Temperature (TJ MAX) . . . . . . . . . 150°C
Operating Temperature Range Model A . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to +85°C Storage Temperature Range . . . . . . . . . . . . . 65°C to +150°C Lead Temperature: RS-28 (Vapor Phase, 60 secs) . . . . . . . . . . . . . . . . . . 215°C RS-28 (Infrared, 15 secs) . . . . . . . . . . . . . . . . . . . . . . 220°C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model AD5544ARS AD5554BRS
RES Bit 16 14
INL LSB ±4 ±1
DNL LSB ± 1.5 ±1
Temperature Range 40/+85°C 40/+85°C
Package Description SSOP-28 SSOP-28
Package Option RS-28 RS-28
The AD5544/AD5554 contain 4196 transistors. The die size is 122 mil × 204 mil.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD5544/AD5554 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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5
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