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Details, datasheet, quote on part number:AD565ASD
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| Part: | AD565ASD |
| Category: | Data Conversion => DAC (Digital to Analog Converters) => 10-14 bit |
| Description: | 12-bit Digital-to-analog Converters, With Zener Reference |
| Company: | Analog Devices |
| Datasheet: | Download AD565ASD datasheet File size : 156 kB |
| Request For quote: | Find where to buy AD565ASD
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Datasheet text preview:
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FEATURES Single Chip Construction Very High-Speed Settling to 1/2 LSB AD565A: 250 ns max AD566A: 350 ns max Full-Scale Switching Time: 30 ns Guaranteed for Operation with 12 V Supplies: AD565A with 12 V Supply: AD566A Linearity Guaranteed Over Temperature: 1/2 LSB max (K, T Grades) Monotonicity Guaranteed Over Temperature Low Power: AD566A = 180 mW max; AD565A = 225 mW max Use with On-Board High-Stability Reference (AD565A) or with External Reference (AD566A) Low Cost MlL-STD-883-Compliant Versions Available PRODUCT DESCRIPTION
REF IN REF GND
High Speed 12-Bit Monolithic D/A Converters AD565A*/AD566A*
FUNCTIONAL BLOCK DIAGRAMS
REF OUT VC C BIPOLAR OFF 20V SPAN 10V 12 .95k 9 .5mA IREF 0k 0 C IOUT = 4 IREF
AD565A
9.95k 5
k8 10V SPAN DAC OUT IO k
5k
DAC
CODE
ODE INPUT
VEE
POWER M S B GND
LSB BIPOLAR OFF 20V SPAN 9.95k 5 k8 10V SPAN C IOUT = 4 IREF 5k
AD566A
REF IN REF GND 12 .95k 9 .5mA IREF 0k 0
DAC
CODE IO k
DAC OUT
The AD565A and AD566A are fast 12-bit digital-to-analog converters that incorporate the latest advances in analog circuit design to achieve high speeds at low cost. The AD565A and AD566A use 12 precision, high-speed bipolar current-steering switches, control amplifier and a laser-trimmed thin-film resistor network to produce a very fast, high accuracy analog output current. The AD565A also includes a buried Zener reference that features low-noise, long-term stability and temperature drift characteristics comparable to the best discrete reference diodes. The combination of performance and flexibility in the AD565A and AD566A has resulted from major innovations in circuit design, an important new high-speed bipolar process, and continuing advances in laser-wafer-trimming techniques (LWT). The AD565A and AD566A have a 1090% full-scale transition time less than 35 ns and settle to within ± 1/2 LSB in 250 ns max (350 ns for AD566A). Both are laser-trimmed at the wafer level to ± 1/8 LSB typical linearity and are specified to ± 1/4 LSB max error (K and T grades) at +25°C. High speed and accuracy make the AD565A and AD566A the ideal choice for high-speed display drivers as well as fast analog-to-digital converters. The laser trimming process which provides the excellent linearity is also used to trim both the absolute value and the temperature coefficient of the reference of the AD565A resulting in a typical full-scale gain TC of 10 ppm/°C. When tighter TC performance is required or when a system reference is available, the AD566A may be used with an external reference.
* Covered by Patent Nos.: 3,803,590; RE 28,633; 4,213,806; 4,136,349; 4,020,486; 3,747,088.
ODE INPUT
VEE
POWER M S B GND
LSB
AD565A and AD566A are available in four performance grades. The J and K are specified for use over the 0°C to +70°C temperature range while the S and T grades are specified for the 55°C to +125°C range. The D grades are all packaged in a 24-lead, hermetically sealed, ceramic, dual-in-line package. The JR grade is packaged in a 28-lead plastic SOIC.
PRODUCT HIGHLIGHTS
1. The wide output compliance range of the AD565A and AD566A are ideally suited for fast, low noise, accurate voltage output configurations without an output amplifier. 2. The devices incorporate a newly developed, fully differential, nonsaturating precision current switching cell structure which combines the dc accuracy and stability first developed in the AD562/3 with very fast switching times and an optimally-damped settling characteristic. 3. The devices also contain SiCr thin film application resistors which can be used with an external op amp to provide a precision voltage output or as input resistors for a successive approximation A/D converter. The resistors are matched to the internal ladder network to guarantee a low gain temperature coefficient and are laser-trimmed for minimum full-scale and bipolar offset errors. 4. The AD565A and AD566A are available in versions compliant with MIL-STD-883. Refer to the Analog Devices Military Products Databook or current /883B data sheet for detailed specifications.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
AD565ASPECIFICATIONS (T = +25 C, V
A
CC
= +15 V, VEE = +15 V, unless otherwise noted.)
M in AD565AK Typ Max Units
Model DATA INPUTS1 (Pins 13 to 24) TTL or 5 Volt CMOS Input Voltage Bit ON Logic "1" Bit OFF Logic "0" Logic Current (Each Bit) Bit ON Logic "1" Bit OFF Logic "0" RESOLUTION OUTPUT Current Unipolar (All Bits On) Bipolar (All Bits On or Off) Resistance (Exclusive of Span Resistors) Offset Unipolar Bipolar (Figure 3, R2 = 50 Fixed) Capacitance Compliance Voltage TMIN to TMAX ACCURACY (Error Relative to Full Scale) +25°C TMIN to TMAX DIFFERENTIAL NONLINEARITY + 2 5 °C TMIN to TMAX TEMPERATURE COEFFICIENTS With Internal Reference Unipolar Zero Bipolar Zero Gain (Full Scale) Differential Nonlinearity SETTLING TIME TO 1/2 LSB All Bits ON-to-OFF or OFF-to-ON FULL-SCALE TRANSITION 10% to 90% Delay plus Rise Time 90% to 10% Delay plus Fall Time TEMPERATURE RANGE Operating Storage POWER REQUIREMENTS VCC, +11.4 to +16.5 V de VEE, 11.4 to 16.5 V dc POWER SUPPLY GAIN SENSITIVITY2 VCC = +11.4 to +16.5 V dc VEE = 11.4 to 16.5 V dc PROGRAMMABLE OUTPUT RANGES (See Figures 2, 3, 4)
Min
AD565AJ Typ
Max
+2.0 +120 +35
+5.5 +0.8 +300 +100 12
+2.0 +120 +35
+5.5 +0.8 +300 +100 12
V V µA µA Bits
1.6 0.8 6
2.0 ± 1.0 8 0.01 0.05 25
2.4 1.2 10 0.05 0.15 +10
1.6 0.8 6
2.0 ± 1.0 8 0.01 0.05 25
2.4 1.2 10 0.05 0.1 +10
mA mA k % of F.S. Range % of F.S. Range pF V LSB % of F.S. Range LSB % of F.S. Range LSB
1.5 ± 1/4 (0.006) ± 1/2 (0.012)
1.5 ± 1/8 (0.003) ± 1/4 (0.006)
1/2 (0.012) 3/4 (0.018)
1/4 (0.006) 1/2 (0.012)
± 1/2 3/4 MONOTONICITY GUARANTEED
± 1/4 1/2 MONOTONICITY GUARANTEED
1 5 15 2 250 15 30 0 65 3 12 3 15 0 to +5 2.5 to +2.5 0 to +10 5 to +5 10 to +10 ± 0.1 ± 0.25 ± 0.15 15 9.90 1.5 ± 0.05
2 10 50
1 5 10 2 250 15 30 0 65 3 12 3 15 0 to +5 2.5 to +2.5 0 to +10 5 to +5 10 to +10
2 10 20
p p m /° C p p m /° C p p m /° C p p m /° C ns ns ns °C °C mA mA ppm of F.S./% ppm of F.S./% V V V V V
400 30 50 +70 +150 5 18 10 25
400 30 50 +70 +150 5 18 10 25
EXTERNAL ADJUSTMENTS Gain Error with Fixed 50 Resistor for R2 (Figure 2) Bipolar Zero Error with Fixed 50 Resistor for R1 (Figure 3) Gain Adjustment Range (Figure 2) Bipolar Zero Adjustment Range REFERENCE INPUT Input Impedance REFERENCE OUTPUT Voltage Current (Available for External Loads)3 POWER DISSIPATION
0.25 0.15 ± 0.25 ± 0.15 15 9.90 1.5
± 0.1 ± 0.05
0.25 ± 0.1
% of F.S. Range % of F.S. Range % of F.S. Range % of F.S. Range k V mA mW
20 10.00 2.5 225
25 10.10 345
20 10.00 2.5 225
25 10.10 345
NOTES 1 The digital inputs are guaranteed but not tested over the operating temperature range. 2 The power supply gain sensitivity is tested in reference to a V CC, VEE of ± 15 V dc. 3 For operation at elevated temperatures the reference cannot supply current for external loads. It, therefore, should be buffered if additional loads are to be supplied. Specifications subject to change without notice.
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AD565A/AD566A
Model DATA INPUTS1 (Pins 13 to 24) TTL or 5 Volt CMOS Input Voltage Bit ON Logic "1" Bit OFF Logic "0" Logic Current (Each Bit) Bit ON Logic "1" Bit OFF Logic "0" RESOLUTION OUTPUT Current Unipolar (All Bits On) Bipolar (All Bits On or Off) Resistance (Exclusive of Span Resistors) Offset Unipolar Bipolar (Figure 3, R2 = 50 Fixed) Capacitance Compliance Voltage TMIN to TMAX ACCURACY (Error Relative to Full Scale) +25°C TMIN to TMAX DIFFERENTIAL NONLINEARITY +25° C TMIN to TMAX TEMPERATURE COEFFICIENTS With Internal Reference Unipolar Zero Bipolar Zero Gain (Full Scale) Differential Nonlinearity SETTLING TIME TO 1/2 LSB All Bits ON-to-OFF or OFF-to-ON FULL-SCALE TRANSITION 10% to 90% Delay plus Rise Time 90% to 10% Delay plus Fall Time TEMPERATURE RANGE Operating Storage POWER REQUIREMENTS VCC, +11.4 to +16.5 V dc VEE, 11.4 to 16.5 V dc POWER SUPPLY GAIN SENSITIVITY2 VCC = +11.4 to +16.5 V dc VEE = 11.4 to 16.5 V dc PROGRAMMABLE OUTPUT RANGES (See Figures 2, 3, 4) Min AD565AS Typ Max Min AD565AT Typ Max Units
+2.0 +120 +35
+5.5 +0.8 +300 +100 12
+2.0 +120 +35
+5.5 +0.8 +300 +100 12
V V µA µA Bits
1.6 0.8 6
2.0 ± 1.0 8 0.01 0.05 25
2.4 1.2 10 0.05 0.15 +10
1.6 0.8 6
2.0 ± 1.0 8 0.01 0.05 25
2.4 1.2 10 0.05 0.1 +10
mA mA k % of F.S. Range % of F.S. Range pF V LSB % of F.S. Range LSB % of F.S. Range LSB
1.5 ± 1/4 (0.006) ± 1/2 (0.012)
1.5 ± 1/8 (0.003) ± 1/4 (0.006)
1/2 (0.012) 3/4 (0.018)
1/4 (0.006) 1/2 (0.012)
± 1/2 3/4 MONOTONICITY GUARANTEED
± 1/4 1/2 MONOTONICITY GUARANTEED
1 5 15 2 250 15 30 55 65 3 12 3 15 0 to +5 2.5 to +2.5 0 to +10 5 to +5 10 to +10 ± 0.1 ± 0.25 ± 0.15 15 9.90 1.5 ± 0.05
2 10 30
1 5 10 2 250 15 30 55 65 3 12 3 15 0 to +5 2.5 to +2.5 0 to +10 5 to +5 10 to +10
2 10 15
p p m /° C p p m /° C p p m /° C p p m /° C ns ns ns °C °C mA mA ppm of F.S./% ppm of F.S./% V V V V V
400 30 50 +125 +150 5 18 10 25
400 30 50 +125 +150 5 18 10 25
EXTERNAL ADJUSTMENTS Gain Error with Fixed 50 Resistor for R2 (Figure 2) Bipolar Zero Error with Fixed 50 Resistor for R1 (Figure 3) Gain Adjustment Range (Figure 2) Bipolar Zero Adjustment Range REFERENCE INPUT Input Impedance REFERENCE OUTPUT Voltage Current (Available for External Loads)3 POWER DISSIPATION
0.25 0.15 ± 0.25 ± 0.15 15 9.90 1.5
± 0.1 ± 0.05
0.25 0.1
% of F.S. Range % of F.S. Range % of F.S. Range % of F.S. Range k V mA mW
20 10.00 2.5 225
25 10.10 345
20 10.00 2.5 225
25 10.10 345
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
Specification subject to change without notice.
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3
AD566ASPECIFICATIONS(T = +25 C, V
A
EE
= 15 V, unless otherwise noted)
AD566AK
Max Min Typ Max Units
AD566AJ
Model DATA INPUTS1 (Pins 13 to 24) TTL or 5 Volt CMOS Input Voltage Bit ON Logic "1" Bit OFF Logic "0" Logic Current (Each Bit) Bit ON Logic "1" Bit OFF Logic "0" RESOLUTION OUTPUT Current Unipolar (All Bits On) Bipolar (All Bits On or Off) Resistance (Exclusive of Span Resistors) Offset Unipolar (Adjustable to Zero per Figure 3) Bipolar (Figure 4, R1 and R2 = 50 Fixed) Capacitance Compliance Voltage TMIN to TMAX ACCURACY (Error Relative to Full Scale) +25°C TMIN to TMAX DIFFERENTIAL NONLINEARITY +25°C TMIN to TMAX TEMPERATURE COEFFICIENTS Unipolar Zero Bipolar Zero Gain (Full Scale) Differential Nonlinearity SETTLING TIME TO 1/2 LSB All Bits ON-to-OFF or OFF-to-ON (Figure 8) FULL-SCALE TRANSITION 10% to 90% Delay plus Rise Time 90% to 10% Delay plus Fall Time POWER REQUIREMENTS VEE, 11.4 to 16.5 V dc POWER SUPPLY GAIN SENSITIVITY 2 VEE = 11.4 to 16.5 V dc PROGRAMMABLE OUTPUT RANGES (see Figures 3, 4, 5) Min Typ
+2.0 0 +120 +35
+5.5 +0.8 +300 +100 12
+2.0 0 +120 +35
+5.5 +0.8 +300 +100 12
V V µA µA Bits
1.6 0.8 6
2.0 ± 1.0 8 0.01 0.05 25
2.4 1.2 10 0.05 0.15 +10
1.6 0.8 6
2.0 ± 1.0 8 0.01 0.05 25
2.4 1.2 10 0.05 0.1 +10
mA mA k % of F.S. Range % of F.S. Range pF V LSB % of F.S. Range LSB % of F.S. Range LSB ppm/ °C ppm/ °C ppm/ °C ppm/ °C ns ns ns mA ppm of F.S./% V V V V V
1.5 ± 1/4 (0.006) ± 1/2 (0.012)
1.5 ± 1/8 (0.003) ± 1/4 (0.006)
1/2 (0.012) 3/4 (0.018)
1/4 (0.006) 1/2 (0.012)
± 1/2 3/4 MONOTONICITY GUARANTEED 1 5 7 2 250 15 30 12 15 0 to +5 2.5 to +2.5 0 to +10 5 to +5 10 to +10 ± 0.1 ± 0.25 ± 0.15 15 ± 0.05 0.25 0.15 2 10 10
± 1/4 1/2 MONOTONICITY GUARANTEED 1 5 3 2 250 15 30 12 15 0 to +5 2.5 to +2.5 0 to +10 5 to +5 10 to +10 ± 0.1 ± 0.25 ± 0.15 15 ± 0.05 0.25 0.1 2 10 5
350 30 50 18 25
350 30 50 18 25
EXTERNAL ADJUSTMENTS Gain Error with Fixed 50 Resistor for R2 (Figure 3) Bipolar Zero Error with Fixed 50 Resistor for R1 (Figure 4) Gain Adjustment Range (Figure 3) Bipolar Zero Adjustment Range REFERENCE INPUT Input Impedance POWER DISSIPATION MULTIPLYING MODE PERFORMANCE (All Models) Quadrants Reference Voltage Accuracy Reference Feedthrough (Unipolar Mode, All Bits OFF, and 1 V to +10 V [p-p], Sine Wave Frequency for 1/2 LSB [p-p] Feedthrough) Output Slew Rate 10%90% 90%10% Output Settling Time (All Bits ON and a 0 V10 V Step Change in Reference Voltage) CONTROL AMPLIFIER Full Power Bandwidth Small-Signal Closed-Loop Bandwidth
% of F.S. Range % of F.S. Range % of F.S. Range % of F.S. Range k mW
20 180
25 300
20 180
25 300
Two (2): Bipolar Operation at Digital Input Only +1 V to +10 V, Unipolar 10 Bits (± 0.05% of Reduced F.S.) for 1 V dc Reference Voltage 40 kHz typ 5 mA/µs 1 mA/µs 1.5 µs to 0.01% F.S. 300 kHz 1.8 MHz
NOTES 1 The digital input levels are guaranteed but not tested over the temperature range. 2 The power supply gain sensitivity is tested in reference to a V EE of 1.5 V dc. Specifications subject to change without notice.
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AD565A/AD566A
AD566AS
Model DATA INPUTS (Pins 13 to 24) TTL or 5 Volt CMOS Input Voltage Bit ON Logic "1" Bit OFF Logic "0" Logic Current (Each Bit) Bit ON Logic "1" Bit OFF Logic "0" RESOLUTION OUTPUT Current Unipolar (All Bits On) Bipolar (All Bits On or Off) Resistance (Exclusive of Span Resistors) Offset Unipolar (Adjustable to Zero per Figure 3) Bipolar (Figure 4, R1 and R2 = 50 Fixed) Capacitance Compliance Voltage TMIN to TMAX ACCURACY (Error Relative to Full Scale) +25°C TMIN to TMAX DIFFERENTIAL NONLINEARITY +25 °C TMIN to TMAX TEMPERATURE COEFFICIENTS Unipolar Zero Bipolar Zero Gain (Full Scale) Differential Nonlinearity SETTLING TIME TO 1/2 LSB All Bits ON-to-OFF or OFF-to-ON (Figure 8) FULL-SCALE TRANSITION 10% to 90% Delay plus Rise Time 90% to 10% Delay plus Fall Time POWER REQUIREMENTS VEE, 11.4 to 16.5 V dc POWER SUPPLY GAIN SENSITIVITY 2 VEE = 11.4 to 16.5 V dc PROGRAMMABLE OUTPUT RANGES (see Figures 3, 4, 5)
1
AD566AT
Max Min Typ Max Units
Min
Typ
+2.0 0 +120 +35
+5.5 +0.8 +300 +100 12
+2.0 0 +120 +35
+5.5 +0.8 +300 +100 12
V V µA µA Bits
1.6 0.8 6
2.0 ± 1.0 8 0.01 0.05 25
2.4 1.2 10 0.05 0.15 +10
1.6 0.8 6
2.0 ± 1.0 8 0.01 0.05 25
2.4 1.2 10 0.05 0.1 +10
mA mA k % of F.S. Range % of F.S. Range pF V LSB % of F.S. Range LSB % of F.S. Range LSB ppm/ °C ppm/ °C ppm/ °C ppm/ °C ns ns ns mA ppm of F.S./% V V V V V
1.5 ± 1/4 (0.006) ± 1/2 (0.012)
1.5 ± 1/8 (0.003) ± 1/4 (0.006)
1/2 (0.012) 3/4 (0.018)
1/4 (0.006) 1/2 (0.012)
± 1/2 3/4 MONOTONICITY GUARANTEED 1 5 7 2 250 15 30 12 15 0 to +5 2.5 to +2.5 0 to +10 5 to +5 10 to +10 ± 0.1 ± 0.25 ± 0.15 15 ± 0.05 0.25 0.15 2 10 10
± 1/4 1/2 MONOTONICITY GUARANTEED 1 5 3 2 250 15 30 12 15 0 to +5 2.5 to +2.5 0 to +10 5 to +5 10 to +10 ± 0.1 ± 0.25 ± 0.15 15 ± 0.05 0.25 0.1 2 10 5
350 30 50 18 25
350 30 50 18 25
EXTERNAL ADJUSTMENTS Gain Error with Fixed 50 Resistor for R2 (Figure 3) Bipolar Zero Error with Fixed 50 Resistor for R1 (Figure 4) Gain Adjustment Range (Figure 3) Bipolar Zero Adjustment Range REFERENCE INPUT Input Impedance POWER DISSIPATION MULTIPLYING MODE PERFORMANCE (All Models) Quadrants Reference Voltage Accuracy Reference Feedthrough (Unipolar Mode, All Bits OFF, and 1 V to +10 V [p-p], Sine Wave Frequency for l/2 LSB [p-p] Feedthrough) Output Slew Rate 10%90% 90%10% Output Settling Time (All Bits ON and a 0 V10 V Step Change in Reference Voltage) CONTROL AMPLIFIER Full Power Bandwidth Small-Signal Closed-Loop Bandwidth
% of F.S. Range % of F.S. Range % of F.S. Range % of F.S. Range k mW
20 180
25 300
20 180
25 300
Two (2): Bipolar Operation at Digital Input Only +1 V to +10 V, Unipolar 10 Bits (± 0.05% of Reduced F.S.) for 1 V dc Reference Voltage 40 kHz typ 5 mA/µs 1 mA/µs 1.5 µs to 0.01% F.S. 300 kHz 1.8 MHz
NOTES Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units. Specification subject to change without notice.
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5
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