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Details, datasheet, quote on part number:AD600J
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Datasheet text preview:
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FEATURES Two Channels with Independent Gain Control "Linear in dB" Gain Response Two Gain Ranges: AD600: 0 dB to +40 dB AD602: 10 dB to +30 dB Accurate Absolute Gain: 0.3 dB Low Input Noise: 1.4 nV/Hz Low Distortion: 60 dBc THD at 1 V Output High Bandwidth: DC to 35 MHz (3 dB) Stable Group Delay: 2 ns Low Power: 125 mW (max) per Amplifier Signal Gating Function for Each Amplifier Drives High Speed A/D Converters MIL-STD-883 Compliant and DESC Versions Available APPLICATIONS Ultrasound and Sonar Time-Gain Control High Performance Audio and RF AGC Systems Signal Measurement
C1HI C1LO VG
Dual, Low Noise, Wideband Variable Gain Amplifiers AD600/AD602*
FUNCTIONAL BLOCK DIAGRAM
GAT1 SCALING REFERENCE
PRECISION PASSIVE INPUT ATTENUATOR
GATING INTERFACE
A1OP
GAIN CONTROL INTERFACE
RF2 2.24k (AD600) 694 (AD602) 22.08dB 30.1dB 36.12dB 42.14dB 62.5 R 2R LADDER NETWORK RF1 20
0dB 6.02dB 12.04dB 18.06dB A1HI 500 A1LO
FIXED GAIN AMPLIFIER
41.07dB (AD600) 31.07dB (AD602)
A1CM
PRODUCT DESCRIPTION
The AD600 and AD602 dual channel, low noise variable gain amplifiers are optimized for use in ultrasound imaging systems, but are applicable to any application requiring very precise gain, low noise and distortion, and wide bandwidth. Each independent channel provides a gain of 0 dB to +40 dB in the AD600 and 10 dB to +30 dB in the AD602. The lower gain of the AD602 results in an improved signal-to-noise ratio at the output. However, both products have the same 1.4 nV/Hz input noise spectral density. The decibel gain is directly proportional to the control voltage, is accurately calibrated, and is supplyand temperature-stable. To achieve the difficult performance objectives, a proprietary circuit form--the X-AMP®--has been developed. Each channel of the X-AMP comprises a variable attenuator of 0 dB to 42.14 dB followed by a high speed fixed gain amplifier. In this way, the amplifier never has to cope with large inputs, and can benefit from the use of negative feedback to precisely define the gain and dynamics. The attenuator is realized as a seven-stage R-2R ladder network having an input resistance of 100 , lasertrimmed to ± 2%. The attenuation between tap points is 6.02 dB; the gain-control circuit provides continuous interpolation between these taps. The resulting control function is linear in dB.
X-AMP is a registered trademark of Analog Devices, Inc. * Patented.
The gain-control interfaces are fully differential, providing an input resistance of ~15 M and a scale factor of 32 dB/V (that is, 31.25 mV/dB) defined by an internal voltage reference. The response time of this interface is less than 1 µs. Each channel also has an independent gating facility that optionally blocks signal transmission and sets the dc output level to within a few millivolts of the output ground. The gating control input is TTL and CMOS compatible. The maximum gain of the AD600 is 41.07 dB, and that of the AD602 is 31.07 dB; the 3 dB bandwidth of both models is nominally 35 MHz, essentially independent of the gain. The signal-to-noise ratio (SNR) for a 1 V rms output and a 1 MHz noise bandwidth is typically 76 dB for the AD600 and 86 dB for the AD602. The amplitude response is flat within ± 0.5 dB from 100 kHz to 10 MHz; over this frequency range the group delay varies by less than ± 2 ns at all gain settings. Each amplifier channel can drive 100 load impedances with low distortion. For example, the peak specified output is ± 2.5 V minimum into a 500 load, or ± 1 V into a 100 load. For a 200 load in shunt with 5 pF, the total harmonic distortion for a ± 1 V sinusoidal output at 10 MHz is typically 60 dBc. The AD600J and AD602J are specified for operation from 0°C to +70°C, and are available in both 16-pin plastic DIP (N) and 16-pin SOIC (R). The AD600A and AD602A are specified for operation from 40°C to +85°C and are available in both 16-pin cerdip (Q) and 16-pin SOIC (R). The AD600S and AD602S are specified for operation from 55°C to +125°C and are available in a 16-pin cerdip (Q) package and are MIL-STD-883 compliant. The AD600S and AD602S are also available under DESC SMD 5962-94572.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
+625 mV, RL = 500
Parameter
AD600/AD6and25SPunlessIotherwiseAnoted. Specificationsamplifier section, at Tare+25 C, V unless V, 625 mVnoted.) 0 C = pF, EC FIC TIONS (Each for AD600 and AD602 = identical = 5 otherwise V ,
A S G L
Conditions
AD600J/AD602J Min Typ Max
AD600A/AD602A Min Typ Max
Units pF nV/Hz dB dB dB
INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Noise Spectral Density1 Noise Figure Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS 3 dB Bandwidth Slew Rate Peak Output2 Output Impedance Output Short-Circuit Current Group Delay Change vs. Gain Group Delay Change vs. Frequency Total Harmonic Distortion ACCURACY AD600 Gain Error
Pins 2 to 3; Pins 6 to 7
98
RS = 50 , Maximum Gain RS = 200 , Maximum Gain f = 100 kHz
100 2 1.4 5.3 2 30
102
95
100 2 1.4 5.3 2 30
105
VOUT = 100 mV rms RL 500 f 10 MHz f = 3 MHz; Full Gain Range VG = 0 V, f = 1 MHz to 10 MHz RL= 200 , VOUT = ± 1 V Peak, Rpd = 1 k ± 2.5
35 275 ±3 2 50 ±2 ±2 60
± 2.5
35 275 ±3 2 50 ±2 ±2 60
MHz V/µs V mA ns ns dBc
Maximum Output Offset Voltage3 Output Offset Variation AD602 Gain Error
0 dB to 3 dB Gain 3 dB to 37 dB Gain 37 dB to 40 dB Gain VG = 625 mV to +625 mV VG = 625 mV to +625 mV 10 dB to 7 dB Gain 7 dB to 27 dB Gain 27 dB to 30 dB Gain VG = 625 mV to +625 mV VG = 625 mV to +625 mV 3 dB to 37 dB (AD600); 7 dB to 27 dB (AD602)
0 0.5 1
+0.5 ± 0.2 0.5 10 10 +0.5 ± 0.2 0.5 5 5
+1 +0.5 0 50 50 +1 +0.5 0 30 30
0.5 0.1 1.5
+0.5 ± 0.2 0.5 10 10 +0.5 ± 0.2 0.5 10 10
+0.5 +1.0 +0.5 65 65 +1.5 +1.0 +0.5 45 45
dB dB dB mV mV dB dB dB mV mV
0 0.5 1
0.5 0.1 1.5
Maximum Output Offset Voltage3 Output Offset Variation GAIN CONTROL INTERFACE Gain Scaling Factor Common-Mode Range Input Bias Current Input Offset Current Differential Input Resistance Response Rate SIGNAL GATING INTERFACE Logic Input "LO" (Output ON) Logic Input "HI" (Output OFF) Response Time Input Resistance Output Gated OFF Output Offset Voltage Output Noise Spectral Density Signal Feedthrough @ 1 MHz AD600 AD602 POWER SUPPLY Specified Operating Range Quiescent Current
31.7 0.75
32 0.35 10 15 40
32.3 2.5 1 50
30.5 0.75
32 0.35 10 15 40
Pins I to 16; Pins 8 to 9 Full 40 dB Gain Change
33.5 2.5 1 50 50
dB/V V µA nA M dB/µs V V µs k mV nV/Hz dB dB
0.8 2.4 ON to OFF, OFF to ON Pins 4 to 3 Pins 5 to 6 0.3 30 ± 10 65 80 70 ± 4.75 11 ± 5.25 12.5 ± 4.75 11 100 2.4 0.3 30 ± 10 65 80 70
0.8
400
± 5.25 14
V mA
NOTES 1 Typical open or short-circuited input; noise is lower when system is set to maximum gain and input is short-circuited. This figure includes the effects of both voltage and current noise sources. 2 Using resistive loads of 500 or greater, or with the addition of a 1 k pull-down resistor when driving lower loads 3 The dc gain of the main amplifier in the AD600 is X113; thus an input offset of only 100 µV becomes an 11.3 mV output offset. In the AD602, the amplifier's gain is X35.7; thus, an input offset of 100 µV becomes a 3.57 mV output offset. Specifications shown in boldface are tested on all production units at final electrical test Results from those tests are used to calculate outgoing quality levels. All min and max specifications guaranteed, although only those shown in boldface are tested on all production units. Specifications subject to change without notice.
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REV. A
AD600/AD602
ABSOLUTE MAXIMUM RATINGS 1
Supply Voltage ± V S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 7 . 5 V Input Voltages Pins 1, 8, 9, 16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VS Pins 2, 3, 6, 7 . . . . . . . . . . . . . . . . . . . . . . . ± 2 V Continuous . . . . . . . . . . . . . . . . . . . . . . . . . ± VS for 10 ms Pins 4, 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VS Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . . . 600 mW Operating Temperature Range (J) . . . . . . . . . . . 0°C to +70°C Operating Temperature Range (A) . . . . . . . . . 40°C to +85°C Operating Temperature Range (S) . . . . . . . . . 55°C to +125°C Storage Temperature Range . . . . . . . . . . . . . 65°C to +150°C Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300°C
NOTES 1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Thermal Characteristics: 16-Pin Plastic Package: JA = 85°C/Watt 16-Pin SOIC Package: JA = 100°C/Watt 16-Pin Cerdip Package: JA = 120°C/Watt
PIN DESCRIPTION
Pin Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 Pin 9
Function Description C1LO A1HI A1LO GAT1 GAT2 A2LO A2HI C2LO C2HI CH1 Gain-Control Input "LO" (Positive Voltage Reduces CH1 Gain). CH1 Signal Input "HI" (Positive Voltage Increases CH1 Output). CH1 Signal Input "LO" (Usually Taken to CH1 Input Ground) CH1 Gating Input (A Logic "HI" Shuts Off CH1 Signal Path). CH2 Gating Input (A Logic "HI" Shuts Off CH2 Signal Path). CH2 Signal Input "LO" (Usually Taken to CH2 Input Ground). CH2 Signal Input "HI" (Positive Voltage Increases CH2 Output). CH2 Gain-Control Input "LO" (Positive Voltage Reduces CH2 Gain). CH2 Gain-Control Input "HI" (Positive Voltage Increases CH2 Gain). CH2 Common (Usually Taken to CH2 Output Ground). CH2 Output. Negative Supply for Both Amplifiers. Positive Supply for Both Amplifiers. CH1 Output. CH1 Common (Usually Taken to CH1 Output Ground). CH1 Gain-Control Input "HI" (Positive Voltage Increases CH1 Gain).
ORDERING GUIDE Gain Range 0 dB to +40 dB 0 dB to +40 dB 10 dB to +30 dB 10 dB to +30 dB 0 dB to +40 dB 0 dB to +40 dB 10 dB to +30 dB 10 dB to +30 dB 0 dB to +40 dB 10 dB to +30 dB Temperatue Range 40°C to +85°C 40°C to +85°C 40°C to +85°C 40°C to +85°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 55°C to +150°C 55°C to +150°C Package Option1 Q-16 R-16 Q-16 R-16 N-16 R-16 N-16 R-16 Q-16 Q-16
Pin 10 A2CM Pin 11 Pin 12 Pin 13 Pin 14 Pin 15 A2OP VNEG VPOS A1OP A1CM
Model AD600AQ AD600AR AD602AQ AD602AR AD600JN AD600JR AD602JN AD602JR AD600SQ/883B 2 AD602SQ/883B 3
Pin 16 C1HI
NOTES 1 N = Plastic DIP; Q= Cerdip; R= Small Outline IC (SOIC). 2 Refer to AD600/AD602 Military data sheet. Also available as 5962-9457201MPA. 3 Refer to AD600/AD602 Military data sheet. Also available as 5962-9457202MPA.
CONNECTION DIAGRAM 16-Pin Plastic DIP (N) Package 16-Pin Plastic SOIC (R) Package 16-Pin Cerdip (Q) Package
C1LO A1HI A1LO GAT1 GAT2 A2LO A2HI C2LO
1 2 A1 3 4 REF 5 6 A2 7 8
16 C1HI 15 14 13 12 A1CM A1OP VPOS VNEG
11 A2OP 10 A2CM 9 C2HI
AD600/AD602
CAUTION ESD (electrostatic discharge) sensitive device. Permanent damage may occur on unconnected devices subject to high energy electrostatic fields. Unused devices must be stored in conductive foam or shunts. The protective foam should be discharged to the destination socket before devices are removed.
WARNING!
ESD SENSITIVE DEVICE
REV. A
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AD600/AD602
THEORY OF OPERATION
The AD600 and AD602 have the same general design and features. They comprise two fixed gain amplifiers, each preceded by a voltage-controlled attenuator of 0 dB to 42.14 dB with independent control interfaces, each having a scaling factor of 32 dB per volt. The gain of each amplifier in the AD600 is laser trimmed to 41.07 dB (X113), thus providing a control range of 1.07 dB to 41.07 dB (0 dB to 40 dB with overlap), while the AD602 amplifiers have a gain of 31.07 dB (X35.8) and provide an overall gain of 11.07 dB to 31.07 dB (10 dB to 30 dB with overlap). The advantage of this topology is that the amplifier can use negative feedback to increase the accuracy of its gain; also, since the amplifier never has to handle large signals at its input, the distortion can be very low. A further feature of this approach is that the small-signal gain and phase response, and thus the pulse response, are essentially independent of gain. The following discussion describes the AD600. Figure 1 is a simplified schematic of one channel. The input attenuator is a seven-section R-2R ladder network, using untrimmed resistors of nominally R = 62.5 , which results in a characteristic resistance of 125 ± 20%. A shunt resistor is included at the input and laser trimmed to establish a more exact input resistance of 100 ± 2%, which ensures accurate operation (gain and HP corner frequency) when used in conjunction with external resistors or capacitors.
GAT1
It will help, in understanding the AD600, to think in terms of a mechanical means for moving this slider from left to right; in fact, it is voltage controlled. The details of the control interface are discussed later. Note that the gain is at all times exactly determined, and a linear decibel relationship is automatically guaranteed between the gain and the control parameter which determines the position of the slider. In practice, the gain deviates from the ideal law, by about ± 0.2 dB peak (see, for example, Figure 6). Note that the signal inputs are not fully differential: A1LO and A1CM (for CH1) and A2LO and A2CM (for CH2) provide separate access to the input and output grounds. This recognizes the practical fact that even when using a ground plane, small differences will arise in the voltages at these nodes. It is important that A1LO and A2LO be connected directly to the input ground(s); significant impedance in these connections will reduce the gain accuracy. A1CM and A2CM should be connected to the load ground(s).
Noise Performance
An important reason for using this approach is the superior noise performance that can be achieved. The nominal resistance seen at the inner tap points of the attenuator is 41.7 (one third of 125 ), which exhibits a Johnson noise spectral density (NSD) of 0.84 nV/Hz (that is, 4kTR) at 27°C, which is a large fraction of the total input noise. The first stage of the amplifier contributes a further 1.12 nV/Hz, for a total input noise of 1.4 nV/Hz. The noise at the 0 dB tap depends on whether the input is short-circuited or open-circuited: when shorted, the minimum NSD of 1.12 nV/Hz is achieved; when open, the resistance of 100 at the first tap generates 1.29 nV/Hz, so the noise increases to a total of 1.71 nV/Hz. (This last calculation would be important if the AD600 were preceded, for example, by a 900 resistor to allow operation from inputs up to ± 10 V rms. However, in most cases the low impedance of the source will limit the maximum noise resistance.) It will be apparent from the foregoing that it is essential to use a low resistance in the design of the ladder network to achieve low noise. In some applications this may be inconvenient, requiring the use of an external buffer or preamplifier. However, very few amplifiers combine the needed low noise with low distortion at maximum input levels, and the power consumption needed to achieve this performance is fundamentally required to be quite high (due to the need to maintain very low resistance values while also coping with large inputs). On the other hand, there is little value in providing a buffer with high input impedance, since the usual reason for this--the minimization of loading of a high resistance source--is not compatible with low noise. Apart from the small variations just discussed, the signal-tonoise (S/ N) ratio at the output is essentially independent of the attenuator setting, since the maximum undistorted output is 1 V rms and the NSD at the output of the AD600 is fixed at 113 times 1.4 nV/Hz, or 158 nV/Hz. Thus, in a 1 MHz bandwidth, the output S/N ratio would be 76 dB. The input NSD of the AD600 and AD602 are the same, but because of the 10 dB lower gain in the AD602's fixed amplifier, its output S/N ratio is 10 dB better, or 86 dB in a 1 MHz bandwidth.
SCALING REFERENCE
PRECISION PASSIVE INPUT ATTENUATOR
GATING INTERFACE
C1HI C1LO
VG
A1OP
GAIN CONTROL INTERFACE
RF2 2.24k (AD600) 694 (AD602) 22.08dB 30.1dB 36.12dB 42.14dB 62.5 R 2R LADDER NETWORK RF1 20
0dB 6.02dB 12.04dB 18.06dB A1HI 500 A1LO
FIXED GAIN AMPLIFIER
41.07dB (AD600) 31.07dB (AD602)
A1CM
Figure 1. Simplified Block Diagram of Single Channel of the AD600 and AD602
The nominal maximum signal at input A1HI is 1 V rms (± 1.4 V peak) when using the recommended ± 5 V supplies, although operation to ± 2 V peak is permissible with some increase in HF distortion and feedthrough. Each attenuator is provided with a separate signal "LO" connection, for use in rejecting commonmode, the voltage between input and output grounds. Circuitry is included to provide rejection of up to ± 100 mV. The signal applied at the input of the ladder network is attenuated by 6.02 dB by each section; thus, the attenuation to each of the taps is progressively 0, 6.02, 12.04, 18.06, 24.08, 30.1, 36.12 and 42.14 dB. A unique circuit technique is employed to interpolate between these tap points, indicated by the "slider" in Figure 1, providing continuous attenuation from 0 dB to 42.14 dB.
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REV. A
AD600/AD602
The Gain-Control Interface Common-Mode Rejection
The attenuation is controlled through a differential, high impedance (15 M) input, with a scaling factor which is laser trimmed to 32 dB per volt, that is, 31.25 mV/dB. Each of the two amplifiers has its own control interface. An internal bandgap reference ensures stability of the scaling with respect to supply and temperature variations, and is the only circuitry common to both channels. When the differential input voltage VG = 0 V, the attenuator "slider" is centered, providing an attenuation of 21.07 dB, thus resulting in an overall gain of 20 dB (= 21.07 dB + 41.07 dB). When the control input is 625 mV, the gain is lowered by 20 dB (= 0.625 × 32), to 0 dB; when set to +625 mV, the gain is increased by 20 dB, to 40 dB. When this interface is overdriven in either direction, the gain approaches either 1.07 dB (= 42.14 dB + 41.07 dB) or 41.07 dB (= 0 + 41.07 dB), respectively. The gain of the AD600 can thus be calculated using the following simple expression: Gain (dB) = 32 VG + 20 where VG is in volts. For the AD602, the expression is: Gain (dB) = 32 VG + 10 (2) Operation is specified for VG in the range from 625 mV dc to +625 mV dc. The high impedance gain-control input ensures minimal loading when driving many amplifiers in multiplechannel applications. The differential input configuration provides flexibility in choosing the appropriate signal levels and polarities for various control schemes. For example, the gain-control input can be fed differentially to the inputs, or single-ended by simply grounding the unused input. In another example, if the gain is to be controlled by a DAC providing a positive only ground referenced output, the "Gain Control LO" pin (either C1LO or C2LO) should be biased to a fixed offset of +625 mV, to set the gain to 0 dB when "Gain Control HI" (C1HI or C2HI) is at zero, and to 40 dB when at +1.25 V. It is a simple matter to include a voltage divider to achieve other scaling factors. When using an 8-bit DAC having a FS output of +2.55 V (10 mV/bit) a divider ratio of 1.6 (generating 6.25 mV/ bit) would result in a gain setting resolution of 0.2 dB/ bit. Later, we will discuss how the two sections of an AD600 or AD602 may be cascaded, when various options exist for gain control.
Signal-Gating Inputs
A special circuit technique is used to provide rejection of voltages appearing between input grounds (A1LO and A2LO) and output grounds (A1CM and A2CM). This is necessary because of the "op amp" form of the amplifier, as shown in Figure 1. The feedback voltage is developed across the resistor RF1 (which, to achieve low noise, has a value of only 20 ). The voltage developed across this resistor is referenced to the input common, so the output voltage is also referred to that node. To provide rejection of this common voltage, an auxiliary amplifier (not shown) is included, which senses the voltage difference between input and output commons and cancels this error component. Thus, for zero differential signal input between A1HI and A1LO, the output A1OP simply follows the voltage at A1CM. Note that the range of voltage differences which can exist between A1LO and A1CM (or A2LO and A2CM) is limited to about ± 100 mV. Figure 50 (one of the typical performance curves at the end of this data sheet) shows typical commonmode rejection ratio versus frequency.
ACHIEVING 80 dB GAIN RANGE
(1)
The two amplifier sections of the X-AMP can be connected in series to achieve higher gain. In this mode, the output of A1 (A1OP and A1CM) drives the input of A2 via a high-pass network (usually just a capacitor) that rejects the dc offset. The nominal gain range is now 2 dB to +82 dB for the AD600 or 22 dB to +62 dB for the AD602. There are several options in connecting the gain-control inputs. The choice depends on the desired signal-to-noise ratio (SNR) and gain error (output ripple). The following examples feature the AD600; the arguments generally apply to the AD602, with appropriate changes to the gain values.
Sequential Mode (Maximum S/N Ratio)
In the sequential mode of operation, the SNR is maintained at its highest level for as much of the gain control range possible, as shown in Figure 2. Note here that the gain range is 0 dB to 80 dB. Figure 3 shows the general connections to accomplish this. Both gain-control inputs, C1HI and C2HI, are driven in parallel by a positive only, ground referenced source with a range of 0 V to +2.5 V.
85 80 75 70
Each amplifier section of the AD600 and AD602 is equipped with a signal gating function, controlled by a TTL or CMOS logic input (GAT1 or GAT2). The ground references for these inputs are the signal input grounds A1LO and A2LO, respectively. Operation of the channel is unaffected when this input is LO or left open-circuited. Signal transmission is blocked when this input is HI. The dc output level of the channel is set to within a few millivolts of the output ground (A1CM or A2CM), and simultaneously the noise level drops significantly. The reduction in noise and spurious signal feedthrough is useful in ultrasound beam-forming applications, where many amplifier outputs are summed.
S/N RATIO dB
65 60 55 50 45 40 35 30 0.5 0.0 0.5 1.0 VG 1.5 2.0 2.5 3.0
Figure 2. S/N Ratio vs. Control Voltage Sequential Control (1 MHz Bandwidth)
REV. A
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