|
Details, datasheet, quote on part number:AD705B
| |
Datasheet text preview:
a
FEATURES DC PERFORMANCE 25 V max Offset Voltage (AD705T) 0.6 V/ C max Drift (AD705K/T) 100 pA max Input Bias Current (AD705K) 600 pA max IB Over MIL Temperature Range (AD705T) 114 dB min CMRR (AD705K/T) 114 dB min PSRR (AD705T) 200 V/mV min Open Loop Gain 0.5 V p-p typ Noise, 0.1 Hz to 10 Hz 600 A max Supply Current AC PERFORMANCE 0.15 V/µs Slew Rate 800 kHz Unity Gain Crossover Frequency 10,000 pF Capacitive Load Drive Capability Low Cost Available in 8-Pin Plastic Mini-DlP, Hermetic Cerdip and Surface Mount (SOIC) Packages MIL-STD-883B Processing Available Dual Version Available: AD706 Quad Version: AD704 APPLICATIONS Low Frequency Active Filters Precision Instrumentation Precision Integrators
Picoampere Input Current Bipolar Op Amp AD705
CONNECTION DIAGRAM Plastic Mini-DIP (N) Cerdip (Q) and Plastic SOIC (R) Packages
OFFSET NULL IN +IN V 1 2 3 4 TOP VIEW 8 7 6 OFFSET NULL V+ OUTPUT OVER COMP
AD705
5
levels, the commonly used "balancing" resistor (connected between the noninverting input of a bipolar op amp and ground) is not required. The AD705 is an excellent choice for use in low frequency active filters in 12- and 14-bit data acquisition systems, in precision instrumentation and as a high quality integrator. The AD705 is internally compensated for unity gain and is available in five performance grades. The AD705J and AD705K are rated over the commercial temperature range of 0°C to +70°C. The AD705A and AD705B are rated over the industrial temperature range of 40°C to +85°C. The AD705T is rated over the military temperature range of 55°C to +125°C and is available processed to MIL-STD-883B, Rev. C. The AD705 is offered in three varieties of 8-pin package: plastic DIP, hermetic cerdip and surface mount (SOIC). "J" grade chips are also available.
PRODUCT HIGHLIGHTS
PRODUCT DESCRIPTION
The AD705 is a low power bipolar op amp that has the low input bias current of a BiFET amplifier but which offers a significantly lower IB drift over temperature. The AD705 offers many of the advantages of BiFET and bipolar op amps without their inherent disadvantages. It utilizes superbeta bipolar input transistors to achieve the picoampere input bias current levels of FET input amplifiers (at room temperature), while its IB typically only increases 5 times vs. BiFET amplifiers which exhibit a 1000X increase over temperature. This means that, at room temperature, while a typical BiFET may have less IB than the AD705, the BiFET's input current will increase to a level of several nA at +125°C. Superbeta bipolar technology also permits the AD705 to achieve the microvolt offset voltage and low noise characteristics of a precision bipolar input amplifier. The AD705 is a high quality replacement for the industrystandard OP07 amplifier while drawing only one sixth of its power supply current. Since it has only 1/20th the input bias current of an OP07, the AD705 can be used with much higher source impedances, while providing the same level of dc precision. In addition, since the input bias currents are at picoAmp REV. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
1. The AD705 is a low drift op amp that offers BiFET level input bias currents, yet has the low IB drift of a bipolar amplifier. It upgrades the performance of circuits using op amps such as the LT1012. 2. The combination of Analog Devices' advanced superbeta processing technology and factory trimming provides both low drift and high dc precision. 3. The AD705 can be used in applications where a chopper amplifier would normally be required but without the chopper's inherent noise and other problems.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
AD705SPECIFICATIONS (@ T = +25 C, V
A
CM
= 0 V, and VS =
Min
15 V dc, unless otherwise noted)
Max 35 60 0.6 114 108 Min AD705T Typ 10 25 0.2 129 126 0.3 30 50 0.6 90 120 30 30 0.4 80 80 Max 25 60 0.6 Units µV µV µV/°C dB dB µV/month pA pA pA/ °C pA pA pA pA pA/ °C pA pA
Parameter INPUT OFFSET VOLTAGE Initial Offset Offset vs. Temp, Average TC vs. Supply (PSRR) TMIN to TMAX Long Term Stability INPUT BIAS CURRENT 1
Conditions
Min
AD705J/A Typ Max 30 45 0.2 129 126 0.3 60 80 0.3 80 100 40 40 0.3 80 80 90 150 1.2
AD705K/B Typ 10 25 0.2 129 126 0.3 30 50 0.3 50 70 30 30 0.3 50 50
TMIN to TMAX VS = ± 2 V to ± 18 V VS = ± 2.5 V to ± 18 V 110 108
110 108
V CM = 0 V V CM = ± 1 3 . 5 V vs. Temp, Average TC TMIN to TMAX TMIN to TMAX INPUT OFFSET CURRENT vs. Temp, Average TC TMIN to TMAX TMIN to TMAX FREQUENCY RESPONSE Unity Gain Crossover Frequency Slew Rate, Unity Gain Slew Rate INPUT IMPEDANCE Differential Common Mode INPUT VOLTAGE RANGE Common-Mode Voltage COMMON-MODE REJECTION RATIO V CM = ± 1 3 . 5 V TMIN to TMAX 0.1 Hz to 10 Hz f = 10 Hz f = 1 kHz f = 10 Hz V O = ± 12 V RLOAD = 10 k TMIN to TMAX V O = ± 10 V RLOAD = 2 k TMIN to TMAX RLOAD = 10 k TMIN to TMAX Short Circuit Gain = +1 Open Loop ± 13.5 110 108 V CM = 0 V V CM = ± 1 3 . 5 V V CM = 0 V V CM = ± 1 3 . 5 V V CM = 0 V V CM = ± 1 3 . 5 V
150 200 250 450 150 200 250 450
100 150 150 350 100 150 150 350
100 150 600 750 100 150 250 450
G = 1 TMIN to TMAX
0.4 0.1 0.05
0.8 0.15 0.15 40 2 300 2 ± 14 132 128 0.5 17 15 50
0.4 0.1 0.05
0.8 0.15 0.15
0.4 0.1 0.05
0.8 0.15 0.15 40 2 300 2
MHz V/µs V/µs M pF G pF V
40 2 300 2 ± 13.5 114 108 ± 14 132 128 0.5 17 15 50 1.0 22 ± 13.5 114 108
± 14 132 128 0.5 17 15 50 1.0 22
dB dB µV p-p n V / H z n V / H z f A / H z V/mV V/mV V/mV V/mV
INPUT VOLTAGE NOISE
22
INPUT CURRENT NOISE OPEN-LOOP GAIN
300 200 200 150 ± 13 13
2000 1500 1000 1000 ± 14 ± 14 ± 15 10,000 200 ± 15 380 400
400 300 300 200 ± 13 13
2000 1500 1000 1000 ± 14 ± 14 ± 15 10,000 200 ± 15 380 400
400 300 300 200 ± 13 13
2000 1500 1000 1000 ± 14 ± 14 ± 15 10,000 200 ± 15 380 400
OUTPUT CHARACTERISTICS Voltage Swing Current Capacitive Load Drive Capability Output Resistance POWER SUPPLY Rated Performance Operating Range Quiescent Current
V V mA pF
2.0 TMIN to TMAX
18 600 800
2.0
18 600 800
2.0
18 600 800
V V µA µA
TEMPERATURE RANGE FOR RATED PERFORMANCE Commercial (0°C to +70°C) Industrial (40°C to +85°C) Military (55°C to +125°C)
AD705J AD705A
AD705K AD705B AD705T
2
REV. B
AD705
Parameter PACKAGE OPTIONS 8-Pin Cerdip (Q-8) 8-Pin Plastic Mini-DIP (N-8) 8-Pin SOIC (R-8) Chips TRANSISTOR COUNT # of Transistors Conditions Min AD705J/A Typ Max Min AD705K/B Typ Max AD705BQ AD705KN Min AD705T Typ AD705TQ Max Units
AD705AQ AD705JN AD705JR AD705JCHIPS 45
45
45
NOTES 1 Bias current specifications are guaranteed maximum at either input. All min and max specifications are guaranteed Specifications in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. Specifications subject to change without notice.
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
0.074 (1.88) NULL 8
8
+VS 7
7
VOUT 6
6
5 OVER COMP
5
0.0677 (1.72)
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . . 650 mW Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . . ± 0.7 V Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite Storage Temperature Range (N, R) . . . . . . . 65°C to +125°C Storage Temperature Range (Q) . . . . . . . . . 65°C to +150°C Operating Temperature Range AD705J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C AD705A/B . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to +85°C AD705T . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to +125°C Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300°C
NOTES 1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-Pin Plastic Package: JA = 165°C/Watt 8-Pin Cerdip Package: JA = 110°C/Watt 8-Pin Small Outline Package: JA = 155°C/Watt 3 The input pins of these amplifiers are protected by back-to-back diodes. If the differential voltage exceeds ± 0.7 V, external series protection resistors should be added to limit the input current to less than 25 mA.
ABSOLUTE MAXIMUM RATINGS 1
NULL 1
2
4
4 VS
IN 2
3
3 +IN
ORDERING GUIDE Model AD705AQ AD705BQ AD705JCHIPS AD705JN AD705JR AD705JR-REEL AD705JR-REEL7 AD705KN AD705TQ AD705TQ/883B Temperature Range 40°C to +85°C 40°C to +85°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 55°C to +125°C 55°C to +125°C Package Description 8-Pin Ceramic DIP 8-Pin Ceramic DIP Bare Die 8-Pin Plastic DIP 8-Pin Plastic SOIC 8-Pin Plastic SOIC 8-Pin Plastic SOIC 8-Pin Plastic DIP 8-Pin Ceramic DIP 8-Pin Ceramic DIP Package Option Q-8 Q-8 N-8 R-8 R-8 R-8 N-8 Q-8 Q-8
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD705 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. B
3
AD705Typical Characteristics (@ +25 C, V =
S
100 SAMPLE SIZE: 610 80
15 V, unless otherwise noted)
200 SAMPLE SIZE: 510 160
NUMBER OF UNITS
200 SAMPLE SIZE: 1040 160
NUMBER OF UNITS
NUMBER OF UNITS
60
120
120
40
80
80
20
40
40
0 80
60 40 20 0 + 20 +40 + 60 +80 INPUT OFFSET VOLTAGE Microvolts
0
0
120 0 +60 +120 60 INPUT BIAS CURRENT Picoamperes
120 60 0 +60 +120 INPUT OFFSET CURRENT Picoamperes
Figure 1. Typical Distribution of Input Offset Voltage
Figure 2. Typical Distribution of Input Bias Current
Figure 3. Typical Distribution of Input Offset Current
INPUT COMMON MODE VOLTAGE LIMIT Volts (REFERRED TO SUPPLY VOLTAGES)
+VS 0.5 1.0 1.5
OUTPUT VOLTAGE Volts p-p
35
100
25 20 15 10 5 0 1k
OFFSET VOLTAGE DRIFT µV/°C
30
SOURCE RESISTANCE MAY BE EITHER BALANCED OR UNBALANCED 10
+1.5 +1.0 +0.5 VS 0 5 10 15 SUPPLY VOLTAGE ±Volts 20
1.0
0.1
10k 100k FREQUENCY Hz
1M
1k
10k 100k 1M 10M SOURCE RESISTANCE
100M
Figure 4. Input Common-Mode Voltage Range vs. Supply Voltage
Figure 5. Large Signal Frequency Response
Figure 6. Offset Voltage Drift vs. Source Resistance
50
4
60
CHANGE IN OFFSET VOLTAGE µV
SAMPLE SIZE: 85 55°C TO +125°C 40
NUMBER OF UNITS
40 3
INPUT BIAS CURRENT pA
20 POSITIVE IB 0
30
2
20
20 NEGATIVE IB
1
10
40
0 0.4 0.2 0 +0.2 +0.4 OFFSET VOLTAGE DRIFT µV/°C
0 0 1 2 3 4 WARM-UP TIME IN MINUTES 5
60 15
10 5 0 +5 +10 COMMON MODE VOLTAGE Volts
+15
Figure 7. Typical Distribution of Offset Voltage Drift
Figure 8. Change in Input Offset Voltage vs. Warm-Up Time
Figure 9. Input Bias Current vs. Common-Mode Voltage
4
REV. B
AD705
1000 1000
VOLTAGE NOISE nV/Hz
CURRENT NOISE fA/Hz
100
100
0.5µV
100 10
10k 20M
10
VOUT = in(2 · 109) 1 1 10 100 FREQUENCY Hz 1000 1 1 10 100 FREQUENCY Hz 1000 0 5 TIME Seconds 10
Figure 10. Input Noise Voltage Spectral Density
Figure 11. Input Noise Current Spectral Density
Figure 12. 0.1 Hz to 10 Hz Noise Voltage
500
160 140
180 160 140
PSRR dB
QUIESCENT CURRENT µA
450
CMRR dB
120 100 80 60 40
+55°C
120 100 PSRR 80 + PSRR 60 40 20 0.1
400
+125°C +25°C
350
20 0
300 0 5 10 15 SUPPLY VOLTAGE ±Volts 20
0.1
1
10 100 1k 10k FREQUENCY Hz
100k
1M
1
10 100 1k 10k FREQUENCY Hz
100k
1M
Figure 13. Quiescent Supply Current vs. Supply Voltage
Figure 14. Common-Mode Rejection vs. Frequency
Figure 15. Power Supply Rejection vs. Frequency
10M
140 120
0
+VS
OUTPUT VOLTAGE LIMIT Volts (REFERRED TO SUPPLY VOLTAGES)
30 60 PHASE 90 120 GAIN 150 180
OPEN LOOP VOLTAGE GAIN
OPEN LOOP VOLTAGE GAIN
55°C +25°C 1M +125°C
PHASE SHIFT Degrees
0.5 1.0 1.5
100 80 60 40 20 0
+1.5 +1.0 +0.5 VS
100k 1 2 4 6 10 20 40 60 LOAD RESISTANCE k 100
20 0.01 0.1
1
10 100 1k 10k 100k 1M 10M FREQUENCY Hz
0
5 10 15 SUPPLY VOLTAGE ±Volts
20
Figure 16. Open Loop Gain vs. Load Resistance over Temperature
Figure 17. Open Loop Gain and Phase Shift vs. Frequency
Figure 18. Output Voltage Limit vs. Supply Voltage
REV. B
5
|
|
