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Details, datasheet, quote on part number:AD7247S
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Datasheet text preview:
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FEATURES Complete Dual 12-Bit DAC Comprising Two 12-Bit CMOS DACs On-Chip Voltage Reference Output Amplifiers Reference Buffer Amplifiers Improved AD7237/AD7247: 12 V to 15 V Operation Faster Interface 30 ns typ Data Setup Time Parallel Loading Structure: AD7247A (8+4) Loading Structure: AD7237A Single or Dual Supply Operation Low Power--165 mW typ in Single Supply
LC2MOS Dual 12-Bit DACPORTs AD7237A/AD7247A
FUNCTIONAL BLOCK DIAGRAMS
GENERAL DESCRIPTION
The AD7237A/AD7247A is an enhanced version of the industry standard AD7237/AD7247. Improvements include operation from 12 V to 15 V supplies, faster interface times and better reference variations with VDD. Additional features include faster settling times. The AD7237A/AD7247A is a complete, dual, 12-bit, voltage output digital-to-analog converter with output amplifiers and Zener voltage reference on a monolithic CMOS chip. No external user trims are required to achieve full specified performance. Both parts are microprocessor compatible, with high speed data latches and interface logic. The AD7247A accepts 12-bit parallel data which is loaded into the respective DAC latch using the WR input and a separate Chip Select input for each DAC. The AD7237A has a double buffered interface structure and an 8-bit wide data bus with data loaded to the respective input latch in two write operations. An asynchronous LDAC signal on the AD7237A updates the DAC latches and analog outputs. A REF OUT/REF IN function is provided which allows either the on-chip 5 V reference or an external reference to be used as a reference voltage for the part. For single supply operation, two output ranges of 0 V to +5 V and 0 V to +10 V are available, while these two ranges plus an additional ± 5 V range are available with dual supplies. The output amplifiers are capable of developing +10 V across a 2 k load to GND. The AD7237A/AD7247A is fabricated in Linear Compatible CMOS (LC2MOS), an advanced, mixed technology process that combines precision bipolar circuits with low power CMOS logic. Both parts are available in a 24-pin, 0.3" wide plastic and hermetic dual-in-line package (DIP) and are also packaged in a 24-lead small outline (SOIC) package. REV. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
PRODUCT HIGHLIGHTS
1. The AD7237A/AD7247A is a dual 12-bit DACPORT® on a single chip. This single chip design and small package size offer considerable space saving and increased reliability over multichip designs. 2. The improved interface times of the parts allow easy, direct interfacing to most modern microprocessors, whether they have 8-bit or 16-bit data bus structures. 3. The AD7237A/AD7247A features a wide power supply range allowing operation from 12 V supplies.
DACPORT is a registered trademark of Analog Devices, Inc.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
RL = 2 k, CL = 100 pF. All specifications TMIN to TMAX unless otherwise noted.)
Parameter STATIC PERFORMANCE Resolution Relative Accuracy3 Differential Nonlinearity3 Unipolar Offset Error3 Bipolar Zero Error3 Full-Scale Error3, 5 Full-Scale Mismatch5 REFERENCE OUTPUT REF OUT Reference Temperature Coefficient Reference Load Change (REF OUT vs. I) REFERENCE INPUT Reference Input Range Input Current6 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IIN (Data Inputs) Input Capacitance6 ANALOG OUTPUTS Output Range Resistors Output Voltage Ranges7 Output Voltage Ranges7 DC Output Impedance A2 12 ±1 ± 0.9 ±3 ±6 ±5 ±1 4.97/5.03 ± 25 1 4.75/5.25 ±5 2.4 0.8 ± 10 8 15/30 +5, +10 +5, +10, ± 5 0.5 B2 12 ± 1/2 ± 0.9 ±3 ±4 ±5 ±1 4.97/5.03 ± 25 1 4.75/5.25 ±5 2.4 0.8 ± 10 8 T2 12 ± 1/2 ± 0.9 ±4 ±6 ±6 ±1 4.95/5.05 ± 25 1 4.75/5.25 ±5 2.4 0.8 ± 10 8
AD7237A/AD7247ASPECIFICATIONS
(VDD = +12 V to +15 V,1 VSS = 0 V or 12 V to 15 V,1 AGND = DGND = 0 V [AD7237A], GND = 0 V [AD7247A], REF IN = +5 V,
Test Conditions/Comments
Units Bits LSB max LSB max LSB max LSB max LSB max LSB typ V min/max ppm/°C typ mV max V min/max µA max V min V max µA max pF max
Guaranteed Monotonic VSS = 0 V or 12 V to 15 V4. DAC Latch Contents All 0s VSS = 12 V to 15 V4. DAC Latch Contents 1000 0000 0000
Reference Load Current Change (0-100 µA) 5 V ± 5%
VIN = 0 V to VDD
15/30 15/30 +5, +10 +5, +10, ± 5 +5, +10, ± 5 0.5 0.5
k min/max V Single Supply; (VSS = 0 V) Dual Supply; (VSS = 12 V to 15 V4) typ Settling Time to Within ± 1/2 LSB of Final Value DAC Latch all 0s to all 1s. Typically 5 µs DAC Latch all 1s to all 0s. Typically 5 µs VSS = 12 V to 15 V4.
AC CHARACTERISTICS6 Voltage Output Settling Time Positive Full-Scale Change 8 Negative Full-Scale Change 8 Digital-to-Analog Glitch Impulse 3 Digital Feedthrough3 Digital Crosstalk3 POWER REQUIREMENTS V DD V SS ID D ISS (Dual Supplies) 30 10 30 +10.8/+16.5 10.8/16.5 15 5
8 8 30 10 30
10 10 30 10 30
µs max µs max
nV secs typ DAC Latch Contents Toggled Between all 0s and all 1s nV secs typ nV secs typ V min/max V min/max mA max mA max For Specified Performance Unless Otherwise Stated For Specified Performance Unless Otherwise Stated Output Unloaded. Typically 10 mA Output Unloaded. Typically 3 mA
+11.4/+15.75 +11.4/+15.75 11.4/15.75 11.4/15.75 15 15 5 5
NOTES 1 Power Supply tolerance is ± 10% for A version and ± 5% for B and T versions. 2 Temperature ranges are as follows: A, B Versions, 40°C to +85°C; T Version, 55°C to +125°C. 3 See Terminology. 4 With appropriate power supply tolerances. 5 Measured with respect to REF IN and includes unipolar/bipolar offset error. 6 Sample tested @ +25°C to ensure compliance. 7 0 V to +10 V range is only available with V DD 14.25 V. Specifications subject to change without notice.
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AD7237A/AD7247A TIMING CHARACTERISTICS
Parameter t1 t2 t3 t4 t5 4 t6 t7 t8 5 0 0 80 80 10 0 0 80
3 3 1, 2 (VDD = +12 V to +15 V, VSS = 0 V or 12 V to 15 V, AGND = DGND = 0 V [AD7237A],
GND = 0 V [AD7247A])
Limit at TMIN, TMAX (A, B Versions)
Limit at TMIN, TMAX (T Version) 0 0 100 80 10 0 0 100
Units ns min ns min ns min ns min ns min ns min ns min ns min
Conditions/Comments CS to WR Setup Time CS to WR Hold Time WR Pulse Width Data Valid to WR Setup Time Data Valid to WR Hold Time Address to WR Setup Time Address to WR Hold Time LDAC Pulse Width
NOTES 1 Sample tested at +25°C to ensure compliance. All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V. 2 See Figures 5 and 7. 3 Power Supply tolerance is ± 10% for A version and ± 5% for B and T versions. 4 If 0 ns < t2 < 10 ns, add t2 to t5. If t2 10 ns, add 10 ns to t 5. 5 AD7237A only.
ABSOLUTE MAXIMUM RATINGS 1
(TA = +25°C unless otherwise noted)
ORDERING GUIDE
VDD to GND (AD7247A) . . . . . . . . . . . . . . . . 0.3 V to +17 V VDD to AGND, DGND (AD7237A) . . . . . . . . 0.3 V to +17 V VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +34 V AGND to DGND (AD7237A) . . . . . . . . . 0.3 V, VDD +0.3 V VOUTA,2 VOUTB2 to AGND (GND) . . VSS 0.3 V to VDD +0.3 V REF OUT to AGND (GND) . . . . . . . . . . . . . . . . . 0 V to VDD REF IN to AGND (GND) . . . . . . . . . . 0.3 V to VDD +0.3 V Digital Inputs to DGND (GND) . . . . . . 0.3 V to VDD +0.3 V Operating Temperature Range Industrial (A, B Versions) . . . . . . . . . . . . . 40°C to +85°C Extended (T Version) . . . . . . . . . . . . . . . 55°C to +125°C Storage Temperature Range . . . . . . . . . . . . 65°C to +150°C Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . +300°C Power Dissipation (Any Package) to +75°C . . . . . . . 1000 mW Derates above +75°C by . . . . . . . . . . . . . . . . . . . . . 10 mW/°C
NOTES 1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Short-circuit current is typically 80 mA. The outputs may be shorted to voltages in this range provided the power dissipation of the package is not exceeded.
Model1 AD7237AAN AD7237ABN AD7237AAR AD7237ABR AD7237ATQ AD7247AAN AD7247ABN AD7247AAR AD7247ABR AD7247ATQ
Temperature Range 40°C to +85°C 40°C to +85°C 40°C to +85°C 40°C to +85°C 55°C to +125°C 40°C to +85°C 40°C to +85°C 40°C to +85°C 40°C to +85°C 55°C to +125°C
Relative Accuracy (LSB) ± 1 max ± 1/2 max ± 1 max ± 1/2 max ± 1/2 max ± 1 max ± 1/2 max ± 1 max ± 1/2 max ± 1/2 max
Package Option2 N-24 N-24 R-24 R-24 Q-24 N-24 N-24 R-24 R-24 Q-24
NOTES 1 To order MIL-STD-883, Class B processed parts, add /883B to part number. Contact local sales office for military data sheet and availability. 2 N = Plastic DIP; Q = Cerdip; R = Small Outline (SOIC).
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7237A/AD7247A features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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AD7237A/AD7247A
AD7237A PIN FUNCTION DESCRIPTION (DIP PIN NUMBERS)
Pin 1
Mnemonic REF INA
Description Voltage Reference Input for DAC A. The reference voltage for DAC A is applied to this pin. It is internally buffered before being applied to the DAC. The nominal reference voltage for correct operation of the AD7237A is 5 V. Voltage Reference Output. The internal 5 V analog reference is provided at this pin. To operate the part with internal reference, REF OUT should be connected to REF INA, REF INB. Voltage Reference Input for DAC B. The reference voltage for DAC B is applied to this pin. It is internally buffered before being applied to the DAC. The nominal reference voltage for correct operation of the AD7237A is 5 V. Output Offset Resistor for DAC B. This input configures the output ranges for DAC B. It is connected to VOUTB for the +5 V range, to AGND for the +10 V range and to REF INB for the ± 5 V range. Analog Output Voltage from DAC B. This is the buffer amplifier output voltage. Three different output voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and ± 5 V. The amplifier is capable of developing +10 V across a 2 k resistor to GND. Analog Ground. Ground reference for DACs, reference and output buffer amplifiers. Data Bit 7. Data Bit 6 to Data Bit 4. Data Bit 3/Data Bit 11 (MSB). Digital Ground. Ground reference for digital circuitry. Data Bit 2/Data Bit 10. Data Bit 1/Data Bit 9. Data Bit 0 (LSB)/Data Bit 8. Address Input. Least significant address input for input latches. A0 and A1 select which of the four input latches data is written to (see Table II). Address Input. Most significant address input for input latches. Chip Select. Active low logic input. The device is selected when this input is active. Write Input. WR is an active low logic input which is used in conjunction with CS, A0 and A1 to write data to the input latches. Load DAC. Logic input. A new word is loaded into the DAC latches from the respective input latches on the falling edge of this signal. Positive Supply (+12 V to +15 V). Analog Output Voltage from DAC A. This is the buffer amplifier output voltage. Three different output voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and ± 5 V. The amplifier is capable of developing +10 V across a 2 k resistor to GND. Negative Supply (0 V or 12 V to 15 V). Output Offset Resistor for DAC A. This input configures the output ranges for DAC A. It is connected to VOUTA for the +5 V range, to AGND for the +10 V range and to REF INA for the ± 5 V range.
2 3
REF OUT REF INB
4 5
R OFSB V OUTB
6 7 8-10 11 12 13 14 15 16 17 18 19 20 21 22
AGND DB7 DB6-DB4 DB3 DGND DB2 DB1 DB0 A0 A1 CS WR LDAC V DD V OUTA
23 24
V SS ROFSA
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AD7237A/AD7247A
AD7247A PIN FUNCTION DESCRIPTION (DIP PIN NUMBERS)
Pin 1 2 3
Mnemonic REF OUT R OFSB V OUTB
Description Voltage Reference Output. The internal 5 V analog reference is provided at this pin. To operate the part with internal reference, REF OUT should be connected to REF IN. Output Offset Resistor for DAC B. This input configures the output ranges for DAC B. It is connected to VOUTB for the +5 V range, to GND for the +10 V range and to REF IN for the ± 5 V range. Analog Output Voltage from DAC B. This is the buffer amplifier output voltage. Three different output voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and ± 5 V. The amplifier is capable of developing +10 V across a 2 k resistor to GND. Data Bit 11 (MSB). Data Bit 10. Ground. Ground reference for all on-chip circuitry. Data Bit 9 to Data Bit 1. Data Bit 0 (LSB). Chip Select Input for DAC B. Active low logic input. DAC B is selected when this input is active. Chip Select Input for DAC A. Active low logic input. DAC A is selected when this input is active. Write Input. WR is an active low logic input which is used in conjunction with CSA and CSB to write data to the DAC latches. Positive Supply (+12 V to +15 V). Analog Output Voltage from DAC A. This is the buffer amplifier output voltage. Three different output voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and ± 5 V. The amplifier is capable of developing +10 V across a 2 k resistor to GND. Negative Supply (0 V or 12 V to 15 V). Output Offset Resistor for DAC A. This input configures the output ranges for DAC A. It is connected to VOUTA for the +5 V range, to GND for the +10 V range and to REF IN for the ± 5 V range. Voltage Reference Input. The common reference voltage for both DACs is applied to this pin. It is internally buffered before being applied to both DACs. The nominal reference voltage for correct operation of the AD7247A is 5 V.
AD7247A PIN CONFIGURATION DIP and SOIC
4 5 6 715 16 17 18 19 20 21
DB11 DB10 GND DB9-DB1 DB0 CSB CSA WR V DD V OUTA
22 23 24
V SS R OFSA REF IN
AD7237A PIN CONFIGURATION DIP and SOIC
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