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Details, datasheet, quote on part number:AD724JR
 
 
Part:AD724JR
Category:Multimedia => Video => TV Applications => NTSC
Description:RGB to Ntsc/pal Encoder
Company:Analog Devices
Datasheet:Download AD724JR datasheet   File size : 211 kB
Request For quote:  Find where to buy AD724JR
 



Datasheet text preview:
a
FEATURES Low Cost, Integrated Solution +5 V Operation Accepts FSC Clock or Crystal, or 4FSC Clock Composite Video and Separate Y/C (S-Video) Outputs Luma and Chroma Outputs Are Time Aligned Minimal External Components: No External Filters or Delay Lines Required Onboard DC Clamp Accepts Either HSYNC and VSYNC or CSYNC Phase Lock to External Subcarrier Drives 75 Reverse-Terminated Loads Logic Selectable NTSC or PAL Encoding Modes Compact 16-Lead SOIC APPLICATIONS RGB to NTSC or PAL Encoding PRODUCT DESCRIPTION

RGB to NTSC/PAL Encoder AD724
operates from a single +5 V supply. No external delay lines or filters are required. The AD724 may be powered down when not in use. The AD724 accepts either FSC or 4FSC clock. When a clock is not available, a low cost parallel-resonant crystal (3.58 MHz (NTSC) or 4.43 MHz (PAL)) and the AD724's on-chip oscillator generate the necessary subcarrier clock. The AD724 also accepts the subcarrier clock from an external video source. The interface to graphics controllers is simple: an on-chip logic "XNOR" accepts the available vertical (VSYNC) and horizontal sync (HSYNC) signals and creates the composite sync (CSYNC) signal on-chip. If available, the AD724 will also accept a standard CSYNC signal by connecting VSYNC to Logic HI and applying CSYNC to the HSYNC pin. The AD724 contains decoding logic to identify valid horizontal sync pulses for correct burst insertion. Delays in the U and V chroma filters are matched by an on-chip sampled-data delay line in the Y signal path. To prevent aliasing, a prefilter at 5 MHz is included ahead of the delay line and a post-filter at 5 MHz is added after the delay line to suppress harmonics in the output. These low-pass filters are optimized for minimum pulse overshoot. The overall luma delay, relative to chroma, has been designed to be time aligned for direct input to a television's baseband. The AD724 comes in a space-saving SOIC and is specified for the 0°C to +70°C commercial temperature range.

The AD724 is a low cost RGB to NTSC/PAL Encoder that converts red, green and blue color component signals into their corresponding luminance (baseband amplitude) and chrominance (subcarrier amplitude and phase) signals in accordance with either NTSC or PAL standards. These two outputs are also combined to provide composite video output. All three outputs can simultaneously drive 75 , reverse-terminated cables. All logical inputs are TTL, 3 V and 5 V CMOS compatible. The chip

FUNCTIONAL BLOCK DIAGRAM
PHASE DETECTOR XOSC 4FSC SYNC SEPARATOR XNOR CSYNC FSC 90° 4FSC QUADRATURE +4 DECODER FSC 0° CSYNC CLOCK AT 8FSC ± 180° (PAL ONLY) SC 90°/270° FSC CHARGE PUMP CSYNC BURST NTSC/PAL

SUBCARRIER

FSC 4FSC

LOOP FILTER

4FSC VCO

NTSC/PAL HSYNC VSYNC

RED

DC CLAMP

Y

3-POLE LP PREFILTER

SAMPLEDDATA DELAY LINE

2-POLE LP POSTFILTER NTSC/PAL

X2

LUMINANCE OUTPUT COMPOSITE OUTPUT CHROMINANCE OUTPUT

GREEN

DC CLAMP

RGB-TO-YUV ENCODING MATRIX

U

4-POLE LPF

U CLAMP BALANCED MODULATORS

X2

4-POLE LPF

X2

BLUE

DC CLAMP

V

4-POLE LPF BURST

V CLAMP

REV. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999

AD724­SPECIFICATIONS 150
Parameter SIGNAL INPUTS (RIN, GIN, BIN) Input Amplitude Black Level1 Input Resistance2 Input Capacitance

(Unless otherwise noted, VS = +5, TA = +25 C, using FSC synchronous clock. All loads are 5% at the IC pins. Outputs are measured at the 75 reverse terminated load.)
Conditions Full Scale 0.8 RIN, GIN, BIN CMOS Logic Levels 1 2 <1 <1 V V µA µA 1 5 Min Typ Max 714 Units mV p-p V M pF

LOGIC INPUTS (HSYNC, VSYNC, FIN, ENCD, STND, SELECT) Logic LO Input Voltage Logic HI Input Voltage Logic LO Input Current (DC) Logic HI Input Current (DC) VIDEO OUTPUTS3 Luminance (LUMA) Roll-Off @ 5 MHz Gain Error Nonlinearity Sync Level DC Black Level Chrominance (CRMA) Bandwidth Color Burst Amplitude Color Signal to Burst Ratio Error4 Color Burst Width Phase Error5 DC Black Level Chroma Feedthrough Composite (COMP) Absolute Gain Error Differential Gain Differential Phase DC Black Level Chroma/Luma Time Alignment POWER SUPPLIES Recommended Supply Range Quiescent Current--Encode Mode6 Quiescent Current--Power Down

NTSC PAL ­15 NTSC PAL 243

­7 ­6 ­3 ± 0.3 286 300 1.3 3.6 4.4 249 288 ±5 2.51 2.28 ±3 2.0 15 ±1 0.5 2.0 1.5 0

+15 329

dB dB % % mV mV V MHz MHz mV p-p mV % µs µs Degrees V mV p-p % % Degrees V ns V mA mA

NTSC PAL NTSC PAL NTSC PAL

170

330

R, G, B = 0 With Respect to Luma With Respect to Chroma With Respect to Chroma ­5

40 5

Single Supply

+4.75 33 1

+5.25 42

NOTES 1 R, G, and B signals are inputted via an external ac coupling capacitor. 2 Except during dc restore period (back porch clamp). 3 All outputs measured at a 75 reverse-terminated load; ac voltages at the IC output pins are twice those specified here. 4 Ratio of chroma amplitude to burst amplitude, difference from ideal. 5 Difference between ideal color-bar phases and the actual values. 6 Driving the logic inputs with VOH < 4 V will increase static supply current approximately 150 µA per input. Specifications are subject to change without notice.

­2­

REV. B

AD724
ABSOLUTE MAXIMUM RATINGS*

Supply Voltage, APOS to AGND . . . . . . . . . . . . . . . . . . +6 V Supply Voltage, DPOS to DGND . . . . . . . . . . . . . . . . . . +6 V AGND to DGND . . . . . . . . . . . . . . . . . . . . . ­0.3 V to +0.3 V Inputs . . . . . . . . . . . . . . . . . DGND ­ 0.3 V to DPOS + 0.3 V Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . . . 800 mW Operating Temperature Range . . . . . . . . . . . . . 0°C to +70°C Storage Temperature Range . . . . . . . . . . . . . ­65°C to +125°C Lead Temperature Range (Soldering 30 sec) . . . . . . . . +230°C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics: 16-Lead SOIC Package: JA = 100°C/W.

PIN CONFIGURATION 16-Lead Wide Body (SOIC) (R-16)
STND 1 AGND 2 FIN 3 APOS 4
16 HSYNC 15 VSYNC 14 DPOS

AD724
TOP VIEW

13 DGND

ENCD 5 (Not to Scale) 12 SELECT RIN 6 GIN 7 BIN 8
11 LUMA 10 COMP 9

CRMA

ORDERING GUIDE

Model

Temperature Package Range Description

Package Option

AD724JR 0°C to +70°C AD724JR-REEL 0°C to +70°C AD724JR-REEL7 0°C to +70°C AD724-EB

16-Lead SOIC R-16 16-Lead SOIC R-16 16-Lead SOIC R-16 Evaluation Board

CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD724 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!
ESD SENSITIVE DEVICE

REV. B

­3­

AD724
PIN FUNCTION DESCRIPTIONS

Pin 1

Mnemonic STND

Description A Logical HIGH input selects NTSC encoding. A Logical LOW input selects PAL encoding. CMOS/TTL Logic Levels. Analog Ground Connection. FSC clock or parallel-resonant crystal, or 4FSC clock input. For NTSC: 3.579 545 MHz or 14.318 180 MHz. For PAL: 4.433 619 MHz or 17.734 480 MHz. CMOS/TTL Logic Levels for subcarrier clocks. Analog Positive Supply (+5 V ± 5%). A Logical HIGH input enables the encode function. A Logical LOW input powers down chip when not in use. CMOS/TTL Logic Levels. Red Component Video Input. 0 to 714 mV AC-Coupled. Green Component Video Input. 0 to 714 mV AC-Coupled. Blue Component Video Input. 0 to 714 mV AC-Coupled. Chrominance Output.* Approximately 1.8 V peak-to-peak for both NTSC and PAL. Composite Video Output.* Approximately 2.5 V peak-to-peak for both NTSC and PAL. Luminance plus SYNC Output.* Approximately 2 V peak-to-peak for both NTSC and PAL. A Logical LOW input selects the FSC operating mode. A Logical HIGH input selects the 4FSC operating mode. CMOS/TTL Logic Levels. Digital Ground Connections. Digital Positive Supply (+5 V ± 5%). Vertical Sync Signal (if using external CSYNC set at > +2 V). CMOS/TTL Logic Levels. Horizontal Sync Signal (or CSYNC signal). CMOS/TTL Logic Levels.

Equivalent Circuit Circuit A

2 3

AGND FIN

Circuit B

4 5

APOS ENCD

Circuit A

6 7 8 9 10 11 12

RIN GIN B IN CRMA COMP LUMA SELECT

Circuit C Circuit C Circuit C Circuit D Circuit D Circuit D Circuit A

13 14 15 16

DGND DPOS VSYNC HSYNC

Circuit A Circuit A

*The Luminance, Chrominance and Composite Outputs are at twice normal levels for driving 75 reverse-terminated lines.

DPOS DPOS

1 5 12 15 16 DGND

6 7 8 DGND VCLAMP

Circuit A
DPOS

Circuit C
APOS DPOS

3

9 10 DGND VBIAS 11 AGND DGND

Circuit B Equivalent Circuits

Circuit D

­4­

REV. B

Typical Performance Characteristics­AD724
+5V TEKTRONIX TSG 300 COMPONENT VIDEO WAVEFORM GENERATOR COMPOSITE SYNC

AD724
RGB 3 FIN 75 RGB TO NTSC/PAL ENCODER

OMPOSITE VIDEO

SONY MONITOR MODEL 1342

7 C 5

GENLOCK

TEKTRONIX 1910 COMPOSITE VIDEO WAVEFORM GENERATOR

FSC

TEKTRONIX VM700A WAVEFORM MONITOR

Figure 1. Evaluation Setup

1.0

APL = 49.8% 525 LINE NTSC NO FILTERING SLOW CLAMP TO 0.00V @ 6.63 s

1.0

APL = 50.8% 525 LINE NTSC NO FILTERING SLOW CLAMP TO 0.00V @ 6.63 s

100

100

0.5

0.5 VOLTS
50

VOLTS

50 IRE 0.0 0
PRECISION MODE OFF SYNCHRONOUS SYNC = SOURCE FRAMES SELECTED : 1 2

0.0

0

SYNCHRONOUS

SYNC = SOURCE FRAMES SELECTED : 1 2

­50 60

IRE

­50 50 60

­0.5

0

10

20

30 s

40

50

­0.5

0

10

20

30 s

40

Figure 2. Modulated Pulse and Bar, NTSC

Figure 4. 100% Color Bars, NTSC

1.0 APL = 50.0% 625 LINE PAL NO FILTERING SLOW CLAMP TO 0.00V @ 6.72 s

1.0
APL = 50.6% 625 LINE PAL NO FILTERING SLOW CLAMP TO 0.00V @ 6.72 s

0.5
VOLTS VOLTS

0.5

0.0

0.0

ASYNCHRONOUS SYNC = SOURCE FRAMES SELECTED : 1 2 3 4 ­0.5 0 10 20 30 s 40 50 60

ASYNCHRONOUS SYNC = SOURCE FRAMES SELECTED : 1 2 3 4

­0.5

0

10

20

30 s

40

50

60

Figure 3. Modulated Pulse and Bar, PAL

Figure 5. 100% Color Bars, PAL

REV. B

­5­