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Part: AD745AN
Category:
Analog & Mixed-Signal Processing
-> Amplifiers
-> Operational Amplifiers
-> Low Noise
Description: Ultralow Noise, High Speed, BiFET op Amp
Company: Analog Devices
Datasheet: Download AD745AN datasheet File size : 464 kB
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FEATURES ULTRALOW NOISE PERFORMANCE 2.9 nV/ Hz at 10 kHz 0.38 V p-p, 0.1 Hz to 10 Hz 6.9 fA/ Hz Current Noise at 1 kHz EXCELLENT AC PERFORMANCE 12.5 V/ s Slew Rate 20 MHz Gain Bandwidth Product THD = 0.0002% @ 1 kHz Internally Compensated for Gains of +5 (or 4) or Greater EXCELLENT DC PERFORMANCE 0.5 mV max Offset Voltage 250 pA max Input Bias Current 2000 V/mV min Open Loop Gain Available in Tape and Reel in Accordance with EIA-481A Standard APPLICATIONS Sonar Photodiode and IR Detector Amplifiers Accelerometers Low Noise Preamplifiers High Performance Audio PRODUCT DESCRIPTION
Ultralow Noise, High Speed, BiFET Op Amp AD745
CONNECTION DIAGRAMS 8-Pin Plastic Mini-DIP (N) & 8-Pin Cerdip (Q) Packages
OFFSET NULL 1 IN 2 +IN 3 VS 4 8 NC
16-Pin SOIC (R) Package
NC 1 OFFSET NULL IN 2 3 16 NC
AD745
15 NC 14 NC 13 +VS 12 OUTPUT 11 OFFSET NULL
AD745
TOP VIEW
7
+VS
6 OUTPUT 5 OFFSET NULL
NC 4 +IN 5
VS 6 NC = NO CONNECT NC 7 TOP VIEW
10 NC 9 NC
NC 8
The AD745's guaranteed, tested maximum input voltage noise of 4 nV/Hz at 10 kHz is unsurpassed for a FET-input monolithic op amp, as is its maximum 1.0 µV p-p noise in a 0.1 Hz to 10 Hz bandwidth. The AD745 also has excellent dc performance with 250 pA maximum input bias current and 0.5 mV maximum offset voltage. The internal compensation of the AD745 is optimized for higher gains, providing a much higher bandwidth and a faster slew rate. This makes the AD745 especially useful as a preamplifier where low level signals require an amplifier that provides both high amplification and wide bandwidth at these higher gains. The AD745 is available in five performance grades. The AD745J and AD745K are rated over the commercial temperature range of 0°C to +70°C. The AD745A and AD745B are rated over the industrial temperature range of 40°C to +85°C. The AD745S is rated over the military temperature range of 55°C to +125°C and is available processed to MIL-STD-883B, Rev. C. The AD745 is available in 8-pin plastic mini-DIP, 8-pin cerdip, 16-pin SOIC, or in chip form.
The AD745 is an ultralow noise, high speed, FET input operational amplifier. It offers both the ultralow voltage noise and high speed generally associated with bipolar input op amps and the very low input currents of FET input devices. Its 20 MHz bandwidth and 12.5 V/µs slew rate makes the AD745 an ideal amplifier for high speed applications demanding low noise and high dc precision. Furthermore, the AD745 does not exhibit an output phase reversal.
1000 R SOURCE EO
INPUT NOISE VOLTAGE nV/ Hz
OP37 & RESISTOR (--)
120 100
120 100 80 60 GAIN 40 20 0 20 10M 100M
R SOURCE 100
80 60 40 20 0
AD745 & RESISTOR OR OP37 & RESISTOR 10
AD745 + RESISTOR ( )
RESISTOR NOISE ONLY ( ) 1 100
1k
10k
100k
1M
10M
REV. C
SOURCE RESISTANCE
20 100
1k
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
10k 100k 1M FREQUENCY Hz
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
PHASE MARGIN Degrees
OPEN-LOOP GAIN dB
PHASE
AD745SPECIFICATIONS
Model Conditions INPUT OFFSET VOLTAGE Initial Offset Initial Offset vs. Temp. vs. Supply (PSRR) vs. Supply (PSRR) INPUT BIAS CURRENT 3 Either Input Either Input @ T MAX Either Input Either Input, V S = ± 5 V INPUT OFFSET CURRENT Offset Current @ T MAX FREQUENCY RESPONSE Gain BW, Small Signal Full Power Response Slew Rate Settling Time to 0.01% Total Harmonic Distortion 4 INPUT IMPEDANCE Differential Common Mode INPUT VOLTAGE RANGE Differential 5 Common-Mode Voltage Over Max Operating Range 6 Common-Mode Rejection Ratio
1
(@ +25 C and
15 V dc, unless otherwise noted)
Min AD745J/A Typ Max Units
0.25 TMIN to TMAX TMIN to TMAX 12 V to 18 V 2 TMIN to TMAX V CM = 0 V V CM = 0 V VCM = +10 V V CM = 0 V V CM = 0 V V CM = 0 V G = 4 VO = 20 V p-p G = 4 f = 1 kHz G = 4 20 120 12.5 5 0.0002 1 × 1010 20 3 × 1011 18 ± 20 +13.3, 10.7 10 V CM = ± 1 0 V TMIN to TMAX 0.1 to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz f = 1 kHz V O = ± 10 V RLOAD 2 k TMIN to TMAX RLOAD = 600 RLOAD 600 RLOAD 600 TMIN to TMAX RLOAD 2 k Short Circuit 80 78 95 2 96
1.0/0.8 1.5
90 88
mV mV µV/°C dB dB
150
400 8.8/25.6 600 200 150 2.2/6.4
pA nA pA pA pA nA
250 30 40
MHz kHz V/µs µs % pF pF V V V dB dB µV p-p n V / H z n V / H z n V / H z n V / H z fA/ Hz V/mV V/mV V/mV
+12
INPUT VOLTAGE NOISE
0.38 5.5 3.6 3.2 2.9 6.9
5.0 4.0
INPUT CURRENT NOISE OPEN LOOP GAIN
1000 800
4000 1200
OUTPUT CHARACTERISTICS Voltage
+13, 12 +13.6, 12.6 +12, 10 ± 12 20 +13.8, 13.1 40 ± 15 8 V
V V V mA
Current POWER SUPPLY Rated Performance Operating Range Quiescent Current TRANSISTOR COUNT
± 4.8
± 18 10.0
V V mA
# of Transistors
50
NOTES 1 Input offset voltage specifications are guaranteed after 5 minutes of operations at T A = +25°C. 2 Test conditions: +V S = 15 V, VS = 12 V to 18 V and +VS = 12 V to +18 V, VS = 15 V. 3 Bias current specifications are guaranteed maximum at either input after 5 minutes of operation at T A = +25°C. For higher temperature, the current doubles every 10°C. 4 Gain = 4, R L = 2 k, CL = 10 pF. 5 Defined as voltagc between inputs, such that neither exceeds ± 10 V from common. 6 The AD745 does not exhibit an output phase reversal when the negative common-mode limit is exceeded. All min and max specifications are guaranteed. Specifications subject to change without notice.
2
REV. C
AD745
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation2 Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 W Cerdip Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 W SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 W Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VS Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite Differential Input Voltage . . . . . . . . . . . . . . . . . . +VS and VS Storage Temperature Range (Q) . . . . . . . . . 65°C to +150°C Storage Temperature Range (N, R) . . . . . . . 65°C to +125°C Operating Temperature Range AD745J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C AD745A/B . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to +85°C AD745S . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to +125°C Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300°C
NOTES 1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 8-Pin Plastic Package: JA = 100°C/W, JC = 50°C/W 8-Pin Cerdip Package: JA = 110°C/W, JC = 30°C/W 8-Pin Plastic SOIC Package: JA = 100°C/W, JC = 30°C/W
ABSOLUTE MAXIMUM RATINGS 1
ESD SUSCEPTIBILITY
An ESD classification per method 3015.6 of MIL-STD-883C has been performed on the AD745, which is a class 1 device. Using an IMCS 5000 automated ESD tester, the two null pins will pass at voltages up to 1000 volts, while all other pins will pass at voltages exceeding 2500 volts.
ORDERING GUIDE
Model AD745JN AD745AN AD745JR-16
Temperature Range 0°C to +70°C 40°C to +85°C 0°C to +70°C
Package Option* N-8 N-8 R-16
*N = Plastic DIP; R = Small Outline IC.
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
REV. C
3
AD745 Typical Characteristics
20
(@ + 25 C, VS =
20
15 V unless otherwise noted)
35
INPUT VOLTAGE SWING Volts
R LOAD = 10k 15 +VIN
OUTPUT VOLTAGE SWING Volts
RLOAD = 10k 15 POSITIVE SUPPLY
OUTPUT VOLTAGE SWING Volts p-p
30 25 20 15 10 5 0 10
10 VIN 5
10 NEGATIVE SUPPLY 5
0 0 10 15 5 SUPPLY VOLTAGE + VOLTS 20
0 0
5 10 15 SUPPLY VOLTAGE + VOLTS
20
100 1k LOAD RESISTANCE
10k
Figure 1. Input Voltage Swing vs. Supply Voltage
Figure 2. Output Voltage Swing vs. Supply Voltage
Figure 3. Output Voltage Swing vs. Load Resistance
12
INPUT BIAS CURRENT Amps
10 6 10 7
200 100
QUIESCENT CURRENT mA
9
OUTPUT IMPEDANCE
10 8 10 9 10
10
10
6
1 CLOSED-LOOP GAIN = 5 0.1
3
10 11 10 12 60 40 20
0 0
15 SUPPLY VOLTAGE ± VOLTS
5
10
20
0 20 40 60 80 100 120 140 TEMPERATURE °C
0.01 10k
100k 1M 10M FREQUENCY Hz
100M
Figure 4. Quiescent Current vs. Supply Voltage
Figure 5. Input Bias Current vs. Temperature
Figure 6. Output Impedance vs. Frequency
300
80 70
28
GAIN BANDWIDTH PRODUCT MHz
26 24 22 20 18 16 14 60 40 20
INPUT BIAS CURRENT pA
CURRENT LIMIT mA
60 50 40 30 20 10 OUTPUT CURRENT + OUTPUT CURRENT
200
100
0 12
9 6 3 3 6 9 0 COMMON-MODE VOLTAGE Volts
12
0 60 40 20 0 20 40 60 80 100 120 140 TEMPERATURE °C
0 20 40 60 80 100 120 140 TEMPERATURE C
Figure 7. Input Bias Current vs. Common-Mode Voltage
Figure 8. Short Circuit Current Limit vs. Temperature
Figure 9. Gain Bandwidth Product vs. Temperature
4
REV. C
Typical Characteristics AD745
120 100 120 100
14
150 RL = 2k
PHASE MARGIN Degrees
OPEN-LOOP GAIN dB
80 60 GAIN 40 20 0
80 60 40 20 0 20 10M 100M
SLEW RATE Volts/µs
12
OPEN-LOOP GAIN dB
PHASE
140
130
CLOSED-LOOP GAIN = +5 10
120
100
20 100
8
60 40 20 0 20 40 60 80 100 120 140
1k
10k 100k 1M FREQUENCY Hz
80
0
TEMPERATURE °C
10 15 5 SUPPLY VOLTAGE ± VOLTS
20
Figure 10. Open-Loop Gain and Phase vs. Frequency
120
COMMON-MODE REJECTION dB
Figure 11. Slew Rate vs. Temperature
120
POWER SUPPLY REJECTION dB
Figure 12. Open-Loop Gain vs. Supply Voltage
35 30 25 R L = 2k 20 15 10 5 0
110 100 90 80 Vcm = ±10V 70 60 50 100
+ SUPPLY 80
60 40
SUPPLY
20
1k
10k
100k
1M
10M
FREQUENCY Hz
0 100
OUTPUT VOLTAGE Volts p-p
100
1k
10k
100k
1M
10M
100M
10k
100k
1M
10M
FREQUENCY Hz
FREQUENCY Hz
Figure 13. Common-Mode Rejection vs. Frequency
Figure 14. Power Supply Rejection vs. Frequency
CURRENT NOISE SPECTRAL DENSITY fA/ Hz
Figure 15. Large Signal Frequency Response
TOTAL HARMONIC DISTORTION (THD) dB
TOTAL HARMONIC DISTORTION (THD) %
Hz
40
1.0
100
1k
60
0.1
NOISE VOLTAGE (reffered to input) nV/
80 GAIN = +10 100 GAIN = +100 120 GAIN = 4 140 10
0.01
10
CLOSED-LOOP GAIN = +5
100
0.001
10
1.0
0.0001
100
1k
10k
0.00001 100k
0.1 10 100 1k 10k 100k 1M 10M FREQUENCY Hz
1.0 1 10 100 1k FREQUENCY Hz 10k 100k
FREQUENCY Hz
Figure 16. Total Harmonic Distortion vs. Frequency
Figure 17. Input Noise Voltage Spectral Density
Figure 18. Input Noise Current Spectral Density
REV. C
5
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