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Details, datasheet, quote on part number:AD7865YS-3
 
 
Part:AD7865YS-3
Category:Data Conversion => ADC (Analog to Digital Converters) => 10-14 bit
Description:Fast, Low-Power, 4-Channel, Simultaneous Sampling, 14-bit ADC
Company:Analog Devices
Datasheet:Download AD7865YS-3 datasheet   File size : 215 kB
Request For quote:  Find where to buy AD7865YS-3
 



Datasheet text preview:
a
FEATURES Fast (2.4 s) 14-Bit ADC Four Simultaneously Sampled Inputs Four Track/Hold Amplifiers 0.35 s Track/Hold Acquisition Time 2.4 s Conversion Time per Channel HW/SW Select of Channel Sequence for Conversion Single Supply Operation Selection of Input Ranges: 10 V, 5 V and 2.5 V, 0 V to 5 V and 0 V to 2.5 V High Speed Parallel Interface Which Also Allows Interfacing to 3 V Processors Low Power, 115 mW Typ Power Saving Mode, 15 W Typ Overvoltage Protection on Analog Inputs APPLICATIONS AC Motor Control Uninterruptible Power Supplies Industrial Power Meters/Monitors Data Acquisition Systems Communications GENERAL DESCRIPTION

Four-Channel, Simultaneous Sampling, Fast, 14-Bit ADC AD7865
FUNCTIONAL BLOCK DIAGRAM
AVDD VREF 6k TRACK/HOLD 4 SIGNAL SCALING SIGNAL SCALING SIGNAL SCALING SIGNAL SCALING VREFAGND DVDD VDRIVE +2A V .5 REFERENCE

STBY VIN1A VIN1B VIN2A VIN2B VIN3A VIN3B VIN4A VIN4B FRSTDATA BUSY EOC

DGND AGND RD

D7865

MUX

14-BIT ADC

OUTPUT LATCH

DB13 DB0

CHANNEL SELECT REGISTER

DB0­DB3 CS WR

CONVERSION CONTROL LOGIC

INT/EXT CLOCK SELECT

INT CLOCK

CONVST

SL3 SL4 H/S CLK IN INT/EXT AGND AGND SEL /SL1 CLK/SL2

The AD7865 is a fast, low power, four-channel simultaneous sampling 14-bit A/D converter that operates from a single 5 V supply. The part contains a 2.4 µs successive approximation ADC, four track/hold amplifiers, 2.5 V reference, on-chip clock oscillator, signal conditioning circuitry and a high speed parallel interface. The input signals on four channels are sampled simultaneously thus preserving the relative phase information of the signals on the four analog inputs. The part accepts analog input ranges of ± 10 V, ± 5 V, ± 2.5 V, 0 V to 2.5 V and 0 V to 5 V. The part allows any subset of the four channels to be converted in order to maximize the throughput rate on the selected sequence. The channels to be converted can be selected either via hardware (channel select input pins) or via software (programming the channel select register). A single conversion start signal (CONVST) simultaneously places all the track/holds into hold and initiates conversion sequence for the selected channels. The EOC signal indicates the end of each individual conversion in the selected conversion sequence. The BUSY signal indicates the end of the conversion sequence. Data is read from the part via a 14-bit parallel data bus using the standard CS and RD signals. Maximum throughput for a single channel is 350 kSPS. For all four channels the maximum throughput is 100 kSPS.

The AD7865 is available in a small (0.3 sq. inch area) 44-lead PQFP.
PRODUCT HIGHLIGHTS

1. The AD7865 features four Track/Hold amplifiers and a fast (2.4 µs) ADC allowing simultaneous sampling and then conversion of any subset of the four channels. 2. The AD7865 operates from a single 5 V supply and consumes only 115 mW typ, making it ideal for low power and portable applications. 3. The part offers a high speed parallel interface for easy connection to microprocessors, microcontrollers and digital signal processors. 4. The part is offered in three versions with different analog input ranges. The AD7865-1 offers the standard industrial ranges of ± 10 V and ± 5 V; the AD7865-2 offers a unipolar range of 0 V to 2.5 V or 0 V to 5 V and the AD7865-3 offers the common signal processing input range of ± 2.5 V. 5. The part features very tight aperture delay matching between the four input sample and hold amplifiers.

REV. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000

AD7865­SPECIFICATIONS cations T
Parameter SAMPLE AND HOLD ­3 dB Full Power Bandwidth Aperture Delay Aperture Jitter Aperture Delay Matching DYNAMIC PERFORMANCE2 Signal to (Noise + Distortion) Ratio 3 @ 25°C AD7865-1, AD7865-3 AD7865-2 TMIN to TMAX AD7865-1, AD7865-3 AD7865-2 Total Harmonic Distortion 3, 4 Peak Harmonic or Spurious Noise 3, 4 Intermodulation Distortion3 2nd Order Terms 3rd Order Terms Channel-to-Channel Isolation 3, 5 DC ACCURACY Resolution Relative Accuracy (INL)3 Differential Nonlinearity (DNL) 3 AD7865-1 Positive Gain Error3 Positive Gain Error Match3 Negative Gain Error3 Negative Gain Error Match3 Bipolar Zero Error Bipolar Zero Error Match AD7865-2 Positive Gain Error3 Positive Gain Error Match3 Unipolar Offset Error3 Unipolar Offset Error Match3 AD7865-3 Positive Gain Error3 Positive Gain Error Match3 Negative Gain Error3 Negative Gain Error Match3 Bipolar Zero Error Bipolar Zero Error Match ANALOG INPUTS AD7865-1 Input Voltage Range Input Current AD7865-2 Input Voltage Range Input Current AD7865-3 Input Voltage Range Input Current A, Y Versions1 3 20 50 4

( V DD = 5 V
MIN

5%, AGND = DGND = 0 V, VREF = Internal. Clock = Internal; all specifito TMAX unless otherwise noted.)
Unit MHz typ ns max ps typ ns max fIN = 100 kHz, fS = 350 kSPS Test Conditions/Comments

B Version 3 20 50 4

78 77 77 76 ­86 ­86 ­95 ­95 ­88 14 ±2 ±1 ± 10 8 ± 10 8 ± 12 6 ± 16 8 ± 10 10 ± 16 8 ± 16 8 ± 14 8

78 77 77 76 ­86 ­86 ­95 ­95 ­88 14 ± 1.5 ±1 ±8 8 ±8 8 ± 10 6 ± 16 8 ± 10 10 ± 14 8 ± 14 8 ± 12 6

dB min dB min dB min dB min dB max dB max

Typically 80 dB Typically 78 dB

fa = 49 kHz, fb = 50 kHz dB typ dB typ dB max Bits LSB max LSB max LSB max LSB max LSB max LSB max LSB max LSB max LSB max LSB max LSB max LSB max LSB max LSB max LSB max LSB max LSB max LSB max

fIN = 50 kHz Sine Wave Any Channel Typically 0.6 LSBs No Missing Codes Guaranteed Typically ± 2 LSBs Typically 2 LSBs Typically ± 2 LSBs Typically 2 LSBs Typically ± 2 LSBs Typically 1.5 LSBs Typically ± 2 LSBs Typically 2 LSBs Typically ± 2 LSBs Typically 2 LSBs Typically ± 6 LSBs Typically 2 LSBs Typically ± 6 LSBs Typically 2 LSBs Typically ± 5 LSBs Typically 2 LSBs

± 5, ± 10 1, 1

± 5, ± 10 1, 1

Volts mA max

VIN = ­5 V and ­10 V Respectively, Typically 0.7 mA

0 V to 2.5 V, 0 V to 5 V 10 1 ± 2.5 1

0 V to 2.5 V, 0 V to 5 V 10 1 ± 2.5 1

Volts µA max mA max Volts mA max

VIN = 2.5 V, 0 V to 2.5 V Range, Typ 1 µA VIN = 5 V, 0 V to 5 V Range, Typ 0.7 mA

VIN = ­2.5 V, Typically 0.7 mA

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REV. B

AD7865
Parameter REFERENCE INPUT/OUTPUT VREF IN Input Voltage Range VREF IN Input Capacitance 6 VREF OUT Output Voltage VREF OUT Error @ 25°C VREF OUT Error TMIN to TMAX VREF OUT Temperature Coefficient VREF OUT Output Impedance LOGIC INPUTS Input High Voltage, V INH Input Low Voltage, VINL Input Current, IIN Input Capacitance, CIN6 LOGIC OUTPUTS Output High Voltage, V OH Output Low Voltage, V OL DB13­DB0 High Impedance Leakage Current Capacitance 6 Output Coding AD7865-1, AD7865-3 AD7865-2 CONVERSION RATE Conversion Time Track/Hold Acquisition Time 2, 3 Throughput Time POWER REQUIREMENTS V DD I DD AD7865-1 Normal Mode Standby Mode AD7865-2 Normal Mode Standby Mode AD7865-3 Normal Mode Standby Mode Power Dissipation AD7865-1 Normal Mode Standby Mode AD7865-2 Normal Mode Standby Mode AD7865-3 Normal Mode Standby Mode A, Y Versions1 2.375/2.625 10 2.5 ± 10 ± 20 25 6 2.4 0.8 ± 10 10 4.0 0.4 B Version 2.375/2.625 10 2.5 ± 10 ± 20 25 6 2.4 0.8 ± 10 10 4.0 0.4 Unit V M I N/ V M A X pF max V nom mV max mV max ppm/°C typ k typ V min V max µA max pF max V min V max Test Conditions/Comments 2.5 V ± 5%

See Reference Section VDD = 5 V ± 5% VDD = 5 V ± 5%

ISOURCE = 400 µA ISINK = 1.6 mA

± 10 10

± 10 10

µA max pF max

Two's Complement Straight (Natural) Binary 2.4 0.35 350 100 5 2.4 0.35 350 100 5 µs max µs max kSPS max kSPS max V nom For Single Channel For Single Channel For All Four Channels ± 5% for Specified Performance Typically 23 mA, Logic Inputs = 0 V or VDD 32 20 30 20 32 20 32 20 30 20 32 20 mA max µA max Typically 20 mA, Logic Inputs = 0 V or VDD mA max µA max Typically 23 mA, Logic Inputs = 0 V or VDD mA max µA max

160 100 150 100 160 100

160 100 150 100 160 100

mW max µW max mW max µW max mW max µW max

Typically 115 mW. VDD = 5 V Typically 15 µW Typically 100 mW. VDD = 5 V Typically 15 µW Typically 115 mW. VDD = 5 V Typically 15 µW

NOTES 1 Temperature ranges are as follows : A, B Versions: ­40°C to +85°C, Y Version: ­40°C to +105°C. 2 Performance measured through full channel (SHA and ADC). 3 See Terminology. 4 Total Harmonic Distortion and Peak Harmonic or Spurious Noise are specified at ­83 dBs for the AD7865-2. 5 Measured between any two channels with the other two channels grounded. 6 Sample tested @ 25°C to ensure compliance. Specifications subject to change without notice.

REV. B

­3­

AD7865 TIMING CHARACTERISTICS1, 2
Parameter tCONV tACQ tBUSY tWAKE-UP --External VREF3 t1 t2 Read Operation t3 t4 t5 t6 4 t7 5 t8 t9 t1 0 t1 1 t1 2 Write Operation t1 3 t1 4 t1 5 t1 6 t1 7 External Clock t1 8

(VDD = 5 V 5%, AGND = DGND = 0 V, VREF = Internal, Clock = Internal; all specifications TMIN to TMAX unless otherwise noted.)
Unit µs max µs max µs max µs max µs max ns min ns min ns min ns min ns min ns max ns max ns min ns max ns min ns min ns max ns max ns max ns min ns min ns min ns min ns min ns min ns min Test Conditions/Comments Conversion Time, Internal Clock Conversion Time, External Clock (5 MHz) Acquisition Time Selected Number of Channels Multiplied by tCONV STBY Rising Edge to CONVST Rising Edge CONVST Pulsewidth CONVST Rising Edge to BUSY Rising Edge CS to RD Setup Time CS to RD Hold Time Read Pulsewidth Data Access Time after Falling Edge of RD, VDRIVE = 5 V Data Access Time after Falling Edge of RD, VDRIVE = 3 V Bus Relinquish Time after Rising Edge of RD Time Between Consecutive Reads EOC Pulsewidth RD Rising Edge to FRSTDATA Edge (Rising or Falling) EOC Falling Edge to FRSTDATA Falling Delay EOC to RD Delay WR Pulsewidth CS to WR Setup Time WR to CS Hold Time Input Data Setup Time of Rising Edge of WR Input Data Hold Time CONVST Falling Edge to CLK Rising Edge

A, B, Y Versions 2.4 3.2 0.35 No. of Channels × (tCONV) 1 35 70 0 0 35 35 40 5 30 15 120 180 70 15 0 20 0 0 5 5 200

NOTES 1 Sample tested at 25°C to ensure compliance. All input signals are measured with tr = tf = 1 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V. 2 See Figures 6, 7 and 8. 3 Refer to the Standby Mode Operation section. The MAX specification of 1 µs is valid when using a 0.1 µF decoupling capacitor on the V REF pin. 4 Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V. 5 These times are derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the times quoted in the timing characteristics are the true bus relinquish times of the part and as such are independent of external bus loading capacitances. Specifications subject to change without notice.

1.6mA

TO OUTPUT PIN 50pF 400 A

1.6V

Figure 1. Load Circuit for Access Time and Bus Relinquish Time

­4­

REV. B

AD7865
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C unless otherwise noted)

VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . ­0.3 V to +7 V VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . ­0.3 V to +7 V VDRIVE to DGND . . . . . . . . . . . . . . . . . . . . . . . . . VDD + 0.3 V Analog Input Voltage to AGND AD7865-1 (± 10 V Input Range) . . . . . . . . . . . . . . . . ± 18 V AD7865-1 (± 5 V Input Range) . . . . . . . . . . . . . . . . . . ± 9 V AD7865-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . ­1 V to +18 V AD7865-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . ­4 V to +18 V Reference Input Voltage to AGND . . . ­0.3 V to VDD + 0.3 V Digital Input Voltage to DGND . . . . . ­0.3 V to VDD + 0.3 V Digital Output Voltage to DGND . . . . ­0.3 V to VDD + 0.3 V

Operating Temperature Range Commercial (A, B Versions) . . . . . . . . . . . ­40°C to +85°C Automotive (Y Version) . . . . . . . . . . . . . . ­40°C to +105°C Storage Temperature Range . . . . . . . . . . . . ­65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150°C PQFP Package, Power Dissipation . . . . . . . . . . . . . . 450 mW JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 95°C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . 215°C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ORDERING GUIDE

Model AD7865AS-1 AD7865BS-1 AD7865YS-1 AD7865AS-2 AD7865BS-2 AD7865YS-2 AD7865AS-3 AD7865BS-3 AD7865YS-3

Input Ranges ± 5 V, ± 10 V ± 5 V, ± 10 V ± 5 V, ± 10 V 0 V to 2.5 V, 0 V to 5 V 0 V to 2.5 V, 0 V to 5 V 0 V to 2.5 V, 0 V to 5 V ± 2.5 V ± 2.5 V ± 2.5 V

Relative Accuracy ± 2 LSB ± 1.5 LSB ± 2 LSB ± 2 LSB ± 1.5 LSB ± 2 LSB ± 2 LSB ± 1.5 LSB ± 2 LSB

Temperature Ranges ­40°C to +85°C ­40°C to +85°C ­40°C to +105°C ­40°C to +85°C ­40°C to +85°C ­40°C to +105°C ­40°C to +85°C ­40°C to +85°C ­40°C to +105°C

Package Description Plastic Lead Quad Flatpack Plastic Lead Quad Flatpack Plastic Lead Quad Flatpack Plastic Lead Quad Flatpack Plastic Lead Quad Flatpack Plastic Lead Quad Flatpack Plastic Lead Quad Flatpack Plastic Lead Quad Flatpack Plastic Lead Quad Flatpack

Package Option S-44 S-44 S-44 S-44 S-44 S-44 S-44 S-44 S-44

PIN CONFIGURATION
VDRIVE DGND EOC DB3 DB5 DVDD DB0 DB2 DB1 DB4 DB6

4 4 4 3 4 2 41 4 0 3 9 3 8 3 7 3 6 3 5 3 4 BUSY 1 FRSTDATA 2 CONVST 3 CS 4 RD 5 WR 6 CLK IN/SL1 7 INT/EXT CLK/SL2 8
PIN 1 IDENTIFIER

3 3 DB7 3 2 DB8 31 DB9 3 0 DB10

AD7865
TOP VIEW (Not to Scale)

2 9 DB11 2 8 DB12 2 7 DB13 2 6 AGND 2 5 AVDD 2 4 VREF 2 3 AGND

SL3 9 SL4 10 H/S SEL 11 12 13 14 15 16 17 18 19 2 0 21 2 2
VIN4B VIN3B AGND AGND VIN2A VIN3A VIN2B VIN1B VIN1A STBY VIN4A

CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7865 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!
ESD SENSITIVE DEVICE

REV. B

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