|
Details, datasheet, quote on part number:AD7890SQ-2
| |
| Part: | AD7890SQ-2 |
| Category: | Data Conversion => ADC (Analog to Digital Converters) => 10-14 bit |
| Description: | True Bipolar Input, Single Supply, 8-Channel, 12-Bit Serial, Data Acquisition System |
| Company: | Analog Devices |
| Datasheet: | Download AD7890SQ-2 datasheet File size : 196 kB |
| Request For quote: | Find where to buy AD7890SQ-2
|
| |
Datasheet text preview:
a
FEATURES Fast 12-Bit ADC with 5.9 s Conversion Time Eight Single-Ended Analog Input Channels Selection of Input Ranges: 10 V for AD7890-10 0 V to 4.096 V for AD7890-4 0 V to 2.5 V for AD7890-2 Allows Separate Access to Multiplexer and ADC On-Chip Track/Hold Amplifier On-Chip Reference High-Speed, Flexible, Serial Interface Single Supply, Low-Power Operation (50 mW Max) Power-Down Mode (75 W Typ)
LC2MOS 8-Channel, 12-Bit Serial, Data Acquisition System AD7890
FUNCTIONAL BLOCK DIAGRAM
VDD MUX SHA OUT IN REF OUT/ REF IN
VIN1 VIN2 VIN3 VIN4 VIN5 VIN6 VIN7 VIN8
S A IGNAL SCALING* SIGNAL SCALING* SIGNAL SCALING* SIGNAL SCALING* SIGNAL SCALING* SIGNAL SCALING* SIGNAL SCALING* SIGNAL SCALING* TRACK/HOLD MUX
2k
2.5V REFERENCE
CEXT
CONVST 12-BIT ADC
OUTPUT/CONTROL REGISTER
GENERAL DESCRIPTION
D7890
The AD7890 is an eight-channel 12-bit data acquisition system. The part contains an input multiplexer, an on-chip track/hold amplifier, a high-speed 12-bit ADC, a 2.5 V reference and a high speed, serial interface. The part operates from a single 5 V supply and accepts an analog input range of ± 10 V (AD7890-10), 0 V to 4.096 V (AD7890-4) and 0 V to 2.5 V (AD7890-2). The multiplexer on the part is independently accessible. This allows the user to insert an antialiasing filter or signal conditioning, if required, between the multiplexer and the ADC. This means that one antialiasing filter can be used for all eight channels. Connection of an external capacitor allows the user to adjust the time given to the multiplexer settling to include any external delays in the filter or signal conditioning circuitry. Output data from the AD7890 is provided via a high-speed bidirectional serial interface port. The part contains an on-chip control register, allowing control of channel selection, conversion start and power-down via the serial port. Versatile, high speed logic ensures easy interfacing to serial ports on microcontrollers and digital signal processors. In addition to the traditional dc accuracy specifications such as linearity, full-scale and offset errors, the AD7890 is also specified for dynamic performance parameters including harmonic distortion and signal-to-noise ratio.
CLOCK
AGND AGND DGND
CLK IN
SCLK TFS RFS
DATA DATA SMODE OUT IN *NO SCALING ON AD7890-2
Power dissipation in normal mode is low at 30 mW typ and the part can be placed in a standby (power-down) mode if it is not required to perform conversions. The AD7890 is fabricated in Analog Devices' Linear Compatible CMOS (LC2MOS) process, a mixed technology process that combines precision bipolar circuits with low power CMOS logic. The part is available in a 24-lead, 0.3" wide, plastic or hermetic dual-in-line package or in a 24-lead small outline package (SOIC).
PRODUCT HIGHLIGHTS
1. Complete 12-Bit Data Acquisition System-on-a-Chip The AD7890 is a complete monolithic ADC combining an eight-channel multiplexer, 12-bit ADC, 2.5 V reference and a track/hold amplifier on a single chip. 2. Separate Access to Multiplexer and ADC The AD7890 provides access to the output of the multiplexer allowing one antialiasing filter for eight channels--a considerable saving over the eight antialiasing filters required if the multiplexer was internally connected to the ADC. 3. High-Speed Serial Interface The part provides a high-speed serial interface for easy connection to serial ports of microcontrollers and DSP processors.
REV. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001
= = AD7890SPECIFICATIONS (cVonn=ec5t V, AGNDIN. DGND = 0 V, REF IN = 2.5TV, funless 2.5 MHz external, MUX OUT to SHA All specifications T to otherwise noted.)
DD CLK IN MIN MAX
Parameter DYNAMIC PERFORMANCE Signal to (Noise + Distortion) Ratio2 Total Harmonic Distortion (THD)2 Peak Harmonic or Spurious Noise2 Intermodulation Distortion 2nd Order Terms 3rd Order Terms Channel-to-Channel Isolation2 DC ACCURACY Resolution Minimum Resolution for Which No Missing Codes Are Guaranteed Relative Accuracy2 Differential Nonlinearity2 Positive Full-Scale Error2 Full-Scale Error Match4 AD7890-2, AD7890-4 Unipolar Offset Error2 Unipolar Offset Error Match AD7890-10 Only Negative Full-Scale Error2 Bipolar Zero Error2 Bipolar Zero Error Match ANALOG INPUTS AD7890-10 Input Voltage Range Input Resistance AD7890-4 Input Voltage Range Input Resistance AD7890-2 Input Voltage Range Input Current MUX OUT OUTPUT Output Voltage Range Output Resistance (AD7890-10, AD7890-4) (AD7890-2) SHA IN INPUT Input Voltage Range Input Current REFERENCE OUTPUT/INPUT REF IN Input Voltage Range Input Impedance Input Capacitance5 REF OUT Output Voltage REF OUT Error @ 25°C TMIN to TMAX REF OUT Temperature Coefficient REF OUT Output Impedance LOGIC INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IIN Input Capacitance, CIN5
A Versions1 70 78 79 80 80 80 12 12 ±1 ±1 ± 2.5 2 ±2 2 ±2 ±5 2
B Versions 70 78 79 80 80 80 12 12 ± 0.5 ±1 ± 2.5 2 ±2 2 ±2 ±5 2
S Version 70 78 79 80 80 80 12 12 ±1 ±1 ± 2.5 2 ±2 2 ±2 ±5 2
Unit dB min dB max dB max dB typ dB typ dB max Bits Bits LSB max LSB max LSB max LSB max LSB max LSB max LSB max LSB max LSB max
Test Conditions/Comments Using External CONVST. Any Channel fIN = 10 kHz Sine Wave, fSAMPLE = 100 kHz3 fIN = 10 kHz Sine Wave, fSAMPLE = 100 kHz3 fIN = 10 kHz Sine Wave, fSAMPLE = 100 kHz3 fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 100 kHz3
fIN = 1 kHz Sine Wave
± 10 20 0 to 4.096 11 0 to 2.5 50 0 to 2.5 3/5 2 0 to 2.5 ± 50 2.375/2.625 1.6 10 2.5 ± 10 ± 20 25 2 2.4 0.8 ± 10 10
± 10 20 0 to 4.096 11 0 to 2.5 50 0 to 2.5 3/5 2 0 to 2.5 ± 50 2.375/2.625 1.6 10 2.5 ± 10 ± 20 25 2 2.4 0.8 ± 10 10
± 10 20 0 to 4.096 11 0 to 2.5 200 0 to 2.5 3/5 2 0 to 2.5 ± 50 2.375/2.625 1.6 10 2.5 ± 10 ± 25 25 2 2.4 0.8 ± 10 10
Volts k min Volts k min Volts nA max Volts k min/k max k max Volts nA max V min/V max k min pF max V nom mV max mV max ppm/°C typ k nom V min V max µA max pF max 2.5 V ± 5% Resistor Connected to Internal Reference Node
Assuming VIN Is Driven from Low Impedance
VDD = 5 V ± 5% VDD = 5 V ± 5% VIN = 0 V to VDD
2
REV. B
AD7890
Parameter LOGIC OUTPUTS Output High Voltage, VOH Output Low Voltage, VOL Serial Data Output Coding AD7890-10 AD7890-4 AD7890-2 CONVERSION RATE Conversion Time Track/Hold Acquisition Time2, 5 POWER REQUIREMENTS V DD IDD (Normal Mode) IDD (Standby Mode)6 @ 25°C Power Dissipation Normal Mode Standby Mode @ 25°C A Versions1 4.0 0.4 B Versions 4.0 0.4 S Version 4.0 0.4 Unit V min V max Test Conditions/Comments ISOURCE = 200 µA ISINK = 1.6 mA
Two's Complement Straight (Natural) Binary Straight (Natural) Binary 5.9 2 5 10 15 50 75 5.9 2 5 10 15 50 75 5.9 2 5 10 15 50 75 µs max µs max V nom mA max µA typ mW max µW typ ± 5% for Specified Performance Logic Inputs = 0 V or VDD Logic Inputs = 0 V or VDD Typically 30 mW fCLK IN = 2.5 MHz, MUX OUT Connected to SHA IN
NOTES 1 Temperature ranges are as follows: A, B Versions: 40°C to +85°C; S Version: 55°C to +125°C. 2 See Terminology. 3 This sample rate is only achievable when tiling the part in external clocking mode. 4 Full-scale error match applies to positive full scale for the AD7890-2 and AD7890-4. It applies to both positive and negative full scale for the AD7890-10. 5 Sample tested @ 25°C to ensure compliance. 6 Analog inputs on AD7890-10 must be at 0 V to achieve correct power-down current. Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C unless otherwise noted)
VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +7 V VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +7 V Analog Input Voltage to AGND AD7890-10, AD7890-4 . . . . . . . . . . . . . . . . . . . . . . . ± 17 V AD7890-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 V, +10 V Reference Input Voltage to AGND . . . 0.3 V to VDD + 0.3 V Digital Input Voltage to DGND . . . . . 0.3 V to VDD + 0.3 V Digital Output Voltage to DGND . . . . 0.3 V to VDD + 0.3 V Operating Temperature Range Commercial (A, B Versions) . . . . . . . . . . . 40°C to +85°C Extended (S Version) . . . . . . . . . . . . . . . . 55°C to +125°C Storage Temperature Range . . . . . . . . . . . 65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 105°C/W Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . 260°C Cerdip Package, Power Dissipation . . . . . . . . . . . . . . 450 mW JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 70°C/W Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . 300°C SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 75°C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215°C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model
AD7890AN-2 AD7890BN-2 AD7890AR-2 AD7890BR-2 AD7890SQ-2 AD7890AN-4 AD7890BN-4 AD7890AR-4 AD7890BR-4 AD7890SQ-4 AD7890AN-10 AD7890BN-10 AD7890AR-10 AD7890BR-10 AD7890SQ-10
Temperature Range
40°C to +85°C 40°C to +85°C 40°C to +85°C 40°C to +85°C 55°C to +125°C 40°C to +85°C 40°C to +85°C 40°C to +85°C 40°C to +85°C 55°C to +125°C 40°C to +85°C 40°C to +85°C 40°C to +85°C 40°C to +85°C 55°C to +125°C
Linearity Error
± 1 LSB ± 1/2 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB
Package Option*
N-24 N-24 R-24 R-24 Q-24 N-24 N-24 R-24 R-24 Q-24 N-24 N-24 R-24 R-24 Q-24
*N = Plastic DIP; Q = Cerdip; R = SOIC.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7890 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. B
3
AD7890 TIMING CHARACTERISTICS1, 2 connected to SHA IN.)
Parameter fC L K I N
3
(VDD = 5 V
5%, AGND = DGND = 0 V, REF IN = 2.5 V, fCLK IN = 2.5 MHz external, MUX OUT
Limit at TMIN, TMAX (A, B, S Versions) 100 2.5 0.3 × tCLK IN 0 3 × tCLK IN 25 25 5.9 100 tCLK IN HI + 50 25 tCLK IN HI tCLK IN LO 20 40 50 0 tCLK IN + 50 0 20 10 20 20 40 50 50 35 20 50 90 20 10 15 40
Unit kHz min MHz max ns min ns min ns max ns max µs max ns min ns max ns max ns nom ns nom ns max ns max ns max ns min ns max ns min ns min ns min ns min ns min ns max ns min ns min ns max ns min ns max ns max ns min ns min ns min ns min
Conditions/Comments Master Clock Frequency. For Specified Performance Master Clock Input Low Time Master Clock Input High Time Digital Output Rise Time. Typically 10 ns Digital Output Fall Time. Typically 10 ns Conversion Time CONVST Pulsewidth RFS Low to SCLK Falling Edge RFS Low to Data Valid Delay SCLK High Pulsewidth SCLK Low Pulsewidth SCLK Rising Edge to Data Valid Delay SCLK Rising Edge to RFS Delay Bus Relinquish Time after Rising Edge of SCLK TFS Low to SCLK Falling Edge Data Valid to TFS Falling Edge Setup Time (A2 Address Bit) Data Valid to SCLK Falling Edge Setup Time Data Valid to SCLK Falling Edge Hold Time TFS to SCLK Falling Edge Hold Time RFS Low to SCLK Falling Edge Setup Time RFS Low to Data Valid Delay SCLK High Pulsewidth SCLK Low Pulsewidth SCLK Rising Edge to Data Valid Delay RFS to SCLK Falling Edge Hold Time Bus Relinquish Time after Rising Edge of RFS Bus Relinquish Time after Rising Edge of SCLK TFS Low to SCLK Falling Edge Setup Time Data Valid to SCLK Falling Edge Setup Time Data Valid to SCLK Falling Edge Hold Time TFS to SCLK Falling Edge Hold Time
tCLK IN LO tCLK IN HI t r4 tf4 tCONVERT tCST Self-Clocking Mode t1 t 25 t3 t4 t 55 t6 t 76 t8 t9 t 10 t 11 t 12 External-Clocking Mode t 13 t 145 t 15 t 16 t 175 t 18 t 196 t19A6 t 20 t 21 t 22 t 23
NOTES 1 Sample tested at 25°C to ensure compliance. All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V. 2 See Figures 8 to 11. 3 The AD7890 is production tested with f CLK IN at 2.5 MHz. It is guaranteed by characterization to operate at 100 kHz. 4 Specified using 10% and 90% points on waveform of interest. 5 These numbers are measured with the load circuit of Figure 1 and defined as the time required for the output to cross 0.8 V or 2.4 V. 6 These numbers are derived from the measured time taken by the data output to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back to remove effects of charging or discharging the 50 pF capacitor. This means that the times quoted in the tim ing characteristics are the true bus relinquish times of the part and as such are independent of external bus loading capacitances.
1.6mA
TO OUTPUT PIN
+2.1V 50pF 200 A
Figure 1. Load Circuit for Access Time and Bus Relinquish Time
4
REV. B
AD7890
PIN FUNCTION DESCRIPTIONS
Pin 1 2
Mnemonic AGND SMODE
Description Analog Ground. Ground reference for track/hold, comparator and DAC. Control Input. Determines whether the part operates in its External Clocking (slave) or Self-Clocking (master) serial mode. With SMODE at a logic low, the part is in its Self-Clocking serial mode with RFS and SCLK as outputs. This Self-Clocking mode is useful for connection to shift registers or to serial ports of DSP processors. With SMODE at a logic high, the part is in its External Clocking serial mode with SCLK and RFS as inputs. This External Clocking mode is useful for connection to the serial port of microcontrollers such as the 8xC51 and the 68HCxx and for connection to the serial ports of DSP processors. Digital Ground. Ground reference for digital circuitry. External Capacitor. An external capacitor is connected to this pin to determine the length of the internal pulse (see CONVST input and Control Register section). Larger capacitances on this pin extend the pulse to allow for settling time delays through an external antialiasing filter or signal conditioning circuitry. Convert Start. Edge-triggered logic input. A low to high transition on this input puts the track/hold into hold and initiates conversion provided that the internal pulse has timed out (see Control Register section). If the internal pulse is active when the CONVST goes high, the track/hold will not go into hold until the pulse times out. If the internal pulse has timed out when CONVST goes high, the rising edge of CONVST drives the track/hold into hold and initiates conversion. Clock Input. An external TTL-compatible clock is applied to this input pin to provide the clock source for the conversion sequence. In the Self-Clocking serial mode, the SCLK output is derived from this CLK IN pin. Serial Clock Input. In the External Clocking (slave) mode (see Serial Interface section) this is an externally applied serial clock which is used to load serial data to the control register and to access data from the output register. In the Self-Clocking (master) mode, the internal serial clock, which is derived from the clock input (CLK IN), appears on this pin. Once again, it is used to load serial data to the control register and to access data from the output register. Transmit Frame Synchronization Pulse. Active low logic input with serial data expected after the falling edge of this signal. Receive Frame Synchronization Pulse. In the External Clocking mode, this pin is an active low logic input with RFS provided externally as a strobe or framing pulse to access serial data from the output register. In the Self-Clocking mode, it is an active low output which is internally generated a n d provides a strobe or framing pulse for serial data from the output register. For applications w h i c h require that data be transmitted and received at the same time, RFS and TFS should be connected together. Serial Data Output. Sixteen bits of serial data are provided with one leading zero, preceding the three address bits of the Control register and the 12 bits of conversion data. Serial data is valid on the falling edge of SCLK for sixteen edges after RFS goes low. Output coding from the ADC is two's complement for the AD7890-10 and straight binary for the AD7890-4 and AD7890-2. Serial Data Input. Serial data to be loaded to the control register is provided at this input. The first five bits of serial data are loaded to the control register on the first five falling edges of SCLK after TFS goes low. Serial data on subsequent SCLK edges is ignored while TFS remains low. Positive supply voltage, 5 V ± 5%. Multiplexer Output. The output of the multiplexer appears at this pin. The output voltage range from this output is 0 V to 2.5 V for the nominal analog input range to the selected channel. The output impedance of this output is nominally 3.5 k. If no external antialiasing filter is required, MUX OUT should be connected to SHA IN. Track/Hold Input. The input to the on-chip track/hold is applied to this pin. It is a high impedance input and the input voltage range is 0 V to 2.5 V. Analog Ground. Ground reference for track/hold, comparator and DAC. Analog Input Channel 1. Single-ended analog input. The analog input range on is ± 10 V (AD7890-10), 0 V to 4.096 V (AD7890-4) and 0 V to 2.5 V (AD7890-2). The channel to be converted is selected using the A0, A1 and A2 bits in the control register. The multiplexer has guaranteed break-beforemake operation. 5
3 4
DGND CEXT
5
CONVST
6
CLK IN
7
SCLK
8 9
TFS RFS
10
DATA OUT
11
DATA IN
12 13
VDD MUX OUT
14 15 16
SHA IN AGND VIN1
REV. B
|
|
