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Details, datasheet, quote on part number:AD7936
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Datasheet text preview:
PRELIMINARY TECHNICAL DATA
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FEATURES F a s t Throughput Rate: 1.5 MSPS Specified for VDD of 2.7 V to 5.25 V L o w Power: 8 mW max at 1.5 MSPS with 3V Supplies 1 6 mW max at 1.5 MSPS with 5V Supplies 8 Analog Input Channels with a Sequencer S o f t w a r e Configurable Analog Inputs: 8 - C h a n n e l Single Ended Inputs 4 - C h a n n e l Fully Differential Inputs 4 - C h a n n e l Pseudo Differential Inputs 7 - C h a n n e l Pseudo Differential Inputs A c c u r a t e On-chip 2.5 V Reference W i d e Input Bandwidth: 7 0 d B SNR at 50kHz Input Frequency N o Pipeline Delays H i g h Speed Parallel Interface operating in B y t e format F u l l Shutdown Mode: 1µA max 2 8 - L e a d TSSOP Package G E N E R A L DESCRIPTION
8-Channel, 1.5 MSPS, 12- & 10-Bit Parallel ADCs with a Sequencer AD7936/AD7935
FUNCTIONAL BLOCK DIAGRAM
VDD VREFIN/ VREFOUT VIN0 I/P MUX VIN7 AGND
AD7936/AD7935
2.5 V VREF T/H 12-/10-BIT SAR ADC AND CONTROL CLKIN C ONV ST BUSY
SEQUENCER
PARALLEL INTERFACE/CONTROL REGISTER
VDRIVE
D0
D7
CS
RD WR W/B
DGND
The AD7936/AD7935 are 12- & 10-bit, high speed, low power, successive approximation (SAR) ADCs. The parts operate from a single 2.7 V to 5.25 V power supply and feature throughput rates up to 1.5 MSPS. The parts contain a low noise, wide bandwidth, differential track/hold amplifier that can handle input frequencies up to 20MHz. The AD7936/AD7935 feature 8 analog input channels with a channel sequencer to allow a pre-programmed selection of channels to be converted sequentially. These parts can operate with either Single-ended, Fully Differential or Pseudo Differential analog inputs. The analog input configuration is chosen by setting the relevant bits in the on-chip Control Register. The conversion process and data acquisition are controlled using standard control inputs allowing easy interfacing to Microprocessors and Dsps. The input signal is sampled on the falling edge of CONVST and the conversion is also initiated at this point. The AD7936/AD7935 has an accurate on-chip 2.5 V reference that can be used as the reference source for the analog to digital conversion. Alternatively, this pin can be overdriven to provide an external reference in the range 100mV to 3.5 V.
These parts use advanced design techniques to achieve very low power dissipation at high throughput rates. They also feature flexible power management options. An on-chip Control register allows the user to set up different operating conditions including analog input range and configuration, output coding, power management and c h a n n e l sequencing.
P R O D U C T HIGHLIGHTS
1 . High Throughput with Low Power Consumption The AD7936/AD7935 offer 1.5 MSPS throughput with 8mW power consumption at VDD = 3V. 2. Eight Analog Inputs with a Channel Sequencer. A sequence of input channels can be selected, through which the AD7936/AD7935 will continuously cycle and convert on. 3. Accurate on-chip 2.5 V reference. 4. Software Configurable Analog Inputs S i n g l e - E n d e d , Pseudo Differential or Fully Differential analog inputs that are software selectable. 5. Single-supply Operation with VDRIVE Function. The AD7936/AD7935 operates from a single 2.7 V to 5.25 V supply. The VDRIVE function allows the parallel interface to connect directly to either 3V or 5 V proces sor systems independent of VDD. 6 . No Pipeline Delay The parts feature a standard successive-approximation ADC with accurate control of the sampling instant via a CONVST input and once off conversion control.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106,U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2003
REV.PrA 03/03
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
PRELIMINARY TECHNICAL DATA
AD7936SPECIFICATIONS1
Parameter D Y N A M I C PERFORMANCE Signal to Noise + Distortion 2 (SINAD) Signal to Noise Ratio (SNR)2 T o t a l Harmonic Distortion (THD) 2 Peak Harmonic or Spurious Noise (SFDR)2 I n t e r m o d u l a t i o n Distortion (IMD) 2 Second Order Terms T h i r d Order Terms Aperture Delay Aperture Jitter C h a n n e l - t o - C h a n n e l Isolation 2 Full Power Bandwidth D C ACCURACY Resolution I n t e g r a l Nonlinearity 2 D i f f e r e n t i a l Nonlinearity 2 Total Unadjusted Error 0V to VREF IN Input Range3 O f f s e t Error Offset Error Match G a i n Error Gain Error Match 0V to 2 x VREF IN Input Range4 Positive Gain Error Positive Gain Error Match Zero Code Error Zero Code Error Match N e g a t i v e Gain Error Negative Gain Error Match A N A L O G INPUT Input Voltage Ranges 70 70 -75 -75
( VDD = VDRIVE=2.7 V to 5.25V, VREFIN/VREFOUT = 2.5V unless otherwise noted, FCLKIN = 20MHz, FSAMPLE = 1.5 MSPS; TA = TMIN to TMAX, unless otherwise noted.)
Units dB min dB min dB max dB max Test Conditions/Comments F IN =50kHz Sine Wave
BVersion1
-80dB typ -82dB typ fa = 40.1kHz, fb = 51.5kHz
-85 -85 10 50 -82 20 2.5 12 ±1 ±0.95 TBD ±3 ±0.5 ±2 ±0.6
dB typ dB typ ns typ ps typ dB typ MHz typ MHz typ Bits L S B max L S B max L S B max LSB LSB LSB LSB max max max max
@ 3 dB @ 0.1 dB
Guaranteed No Missed Codes to 12 Bits. Straight Binary Output Coding
-VREF IN to +VREF IN Biased about VREF with Twos Complement Output Coding ±2 ±0.6 ±3 ±1 ±1 ±0.5 0 to VREF 0 to 2xVREF ±1 20 2.55 ±1 2.49/2.51 15 10 0.7xVDRIVE 0.3xVDRIVE ±1 10 LSB LSB LSB LSB LSB LSB V V µ A max pF typ V µ A max Vmin/max ppm/°C typ V min V max µ A max p F max ± 1 % Specified Performance max max max max max max RANGE bit in the Control register set to 1. RANGE bit in the Control register set to 0. VDD/VDRIVE = 4.75 V to 5.25 V for 0-2VREF range
DC Leakage Current Input Capacitance R E F E R E N C E INPUT/OUTPUT V REFIN Input Voltage DC Leakage Current VREFOUT Output Voltage V R E F O U T Tempco V REF Output Impedance L O G I C INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IIN Input Capacitance, CIN6 L O G I C OUTPUTS Output High Voltage, VOH Output Low Voltage, VOL F l o a t i n g - S t a t e Leakage Current F l o a t i n g - S t a t e Output Capacitance 6 Output Coding
Typically 10 nA, VIN = 0 V or VDRIVE
VDRIVE -0.2 V min 0.4 V max ±10 µ A max 10 p F max Straight (Natural) Binary 2 s Complement 2
ISOURCE = 200 µA; VDD = 2.7 V to 5.25 V I S I N K =200µA CODING bit in the control register set to 1. CODING bit in the control register set to 0. REV. PrA
AD7936SPECIFICATIONS1
Parameter C O N V E R S I O N RATE Conversion Time Track/Hold Acquisition Time Throughput Rate P O W E R REQUIREMENTS V DD V DRIVE I DD N o r m a l Mode(Static) N o r m a l Mode (Operational) Auto StandBy Mode Auto Shutdown Mode Full Shut-Down Mode P o w e r Dissipation N o r m a l Mode (Operational) Auto Standby-Mode (Static) Auto Shutdown-Mode (Static) F u l l Shutdown-Mode 12
PRELIMINARY TECHNICAL DATA
B Version1 Units CLKIN cycles (max) ns max ns max M S P S max V min/max V min/max mA typ m A max m A max mA typ µ A max mA typ µ A max µA max m W max m W max µ W max µ W max µ W max µ W max µ W max µ W max Digital VD D = VDD = VD D = I/Ps = 0V or VDRIVE. 2.7V to 5.25V. 4.75V to 5.25V. 2.7V to 3.6V. Test Conditions/Comments
300 325 1.5 2.7/5.25 2.7/5.25 0.5 3.2 2.6 1.55 90 1 1 1 16 8 450 270 5 3 5 3
Sine Wave Input Full-Scale Step Input Conversion Time + Acquisition Time
(Static) (Static) SCLK On or Off. VD D VD D VD D VD D VD D VD D VD D VD D = = = = = = = = 5V. 3V. 5V. 3V. 5V. 3V. 5V. 3V.
NOTES 1 T e m p e r a t u r e ranges as follows: B Versions: 40°C to +85°C. 2 S e e Terminology Section. 3 B i t 9 in the Control register set to 1 4 B i t 9 in the Control register set to 0 5 T h i s device is operational with an external reference in the range 0.1 V to 3.5 V. 6 S a m p l e tested @ +25°C to ensure compliance. S p e c i f i c a t i o n s subject to change without notice.
REV. PrA
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PRELIMINARY TECHNICAL DATA
AD7935SPECIFICATIONS1
Parameter D Y N A M I C PERFORMANCE Signal to Noise + Distortion 2 (SINAD) Signal to Noise Ratio (SNR)2 T o t a l Harmonic Distortion (THD) 2 Peak Harmonic or Spurious Noise2 (SFDR) Intermodulation Distortion (IMD)2 Second Order Terms T h i r d Order Terms Aperture Delay Aperture Jitter C h a n n e l - t o - C h a n n e l Isolation 2 Full Power Bandwidth D C ACCURACY Resolution I n t e g r a l Nonlinearity 2 D i f f e r e n t i a l Nonlinearity Total Unadjusted Error 0V to VREF IN Input Range3 O f f s e t Error Offset Error Match G a i n Error Gain Error Match 0V to 2 x VREF IN Input Range4 Positive Gain Error Positive Gain Error Match Zero Code Error Zero Code Error Match N e g a t i v e Gain Error Negative Gain Error Match A N A L O G INPUT Input Voltage Ranges B Version1 60 60 -73 -73
( VDD = VDRIVE=2.7 V to 5.25V, VREFIN/VREFOUT = 2.5V unless otherwise noted, FCLKIN = 20MHz, FSAMPLE = 1.5MSPS; TA = TMIN to TMAX, unless otherwise noted.)
Units dB min dB min dB max dB max fa = 40.1kHz, fb = 51.5kHz Test Conditions/Comments F IN =50kHz Sine Wave
-75 -75 10 50 -82 20 2.5 10 ±0.5 ±0.5 TBD ±3 ±0.5 ±2 ±0.6
dB typ dB typ ns typ ps typ dB typ MHz typ MHz typ Bits L S B max L S B max L S B max LSB LSB LSB LSB max max max max
@ 3 dB @ 0.1 dB
Guaranteed No Missed Codes to 10 Bits. Straight Binary Output Coding
-VREF IN to +VREF IN Biased about VREF with T w o s Complement Output CodingOffset ±2 ±0.6 ±3 ±1 ±1 ±0.5 0 to VREF 0 to 2xVREF ±1 20 2.55 ±1 36 2.49/2.51 15 10 0.7xVDRIVE 0.3xVDRIVE ±1 10 LSB LSB LSB LSB LSB LSB V V µ A max pF typ V µ A max k Vmin/max ppm/°C typ V min V max µ A max p F max ± 1 % Specified Performance max max max max max max RANGE bit in the Control register set to 1. RANGE bit in the Control register set to 0. VDD/VDRIVE = 4.75 V to 5.25 V for 0-2VREF range
DC Leakage Current Input Capacitance R E F E R E N C E INPUT/OUTPUT V REFIN Input Voltage DC Leakage Current V REFIN Input Impedance VREFOUT Output Voltage V R E F O U T Tempco VREF Output Impedance L O G I C INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IIN Input Capacitance, CIN6 L O G I C OUTPUTS Output High Voltage, VOH Output Low Voltage, VOL F l o a t i n g - S t a t e Leakage Current F l o a t i n g - S t a t e Output Capacitance 6 Output Coding
Typically 10 nA, VIN = 0 V or VDRIVE
VDRIVE -0.2 V min 0.4 V max ±10 µ A max 10 p F max Straight (Natural) Binary 2 s Complement 4
ISOURCE = 200 µA; VDD = 2.7 V to 5.25 V I S I N K =200µA CODING bit in the control register set to 1. CODING bit in the control register set to 0. REV. PrA
PRELIMINARY TECHNICAL DATA
AD7935SPECIFICATIONS1
Parameter C O N V E R S I O N RATE Conversion Time Track/Hold Acquisition Time Throughput Rate P O W E R REQUIREMENTS VDD VDRIVE I DD N o r m a l Mode(Static) N o r m a l Mode (Operational) Auto StandBy Mode Auto Shutdown Mode Full Shut-Down Mode P o w e r Dissipation N o r m a l Mode (Operational) Auto Standby-Mode (Static) Auto Shutdown-Mode (Static) F u l l Shutdown-Mode B Version1 10 300 325 1.5 2.7/5.25 2.7/5.25 0.5 3.2 2.6 1.55 90 1 1 1 16 8 450 270 5 3 5 3 Units CLKIN cycles (max) ns max ns max M S P S max V min/max V min/max mA typ m A max m A max mA typ µ A max mA typ µ A max µA max m W max m W max µ W max µ W max µ W max µ W max µ W max µ W max Digital VD D = VDD = VD D = I/Ps = 0V or VDRIVE. 2.7V to 5.25V. 4.75V to 5.25V. 2.7V to 3.6V. Test Conditions/Comments
Sine Wave Input Full-Scale Step Input Conversion Time + Acquisition Time
(Static) (Static) SCLK On or Off. V DD V DD V DD V DD V DD V DD V DD V DD = = = = = = = = 5V. 3V. 5V. 3V. 5V. 3V. 5V. 3V.
NOTES 1 T e m p e r a t u r e ranges as follows: B Versions: 40°C to +85°C. 2 S e e Terminology Section 3 B i t 9 in the Control register set to 1 4 B i t 9 in the Control register set to 0 5 T h i s device is operational with an external reference in the range 0.1 V to 3.5 V. 6 S a m p l e tested @ +25°C to ensure compliance. S p e c i f i c a t i o n s subject to change without notice.
REV. PrA
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