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Details, datasheet, quote on part number:AD8200R
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| Part: | AD8200R |
| Category: | Analog & Mixed-Signal Processing => Amplifiers => Instrumentation Amplifiers |
| Description: | High Common-mode Voltage, Single Supply Difference Amplifier |
| Company: | Analog Devices |
| Datasheet: | Download AD8200R datasheet File size : 182 kB |
| Request For quote: | Find where to buy AD8200R
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Datasheet text preview:
a
High Common-Mode Voltage, Single Supply Difference Amplifier AD8200
FUNCTIONAL BLOCK DIAGRAM SOIC (R) Package DIE Form
NC A1 A2 +VS
FEATURES High Common-Mode Voltage Range 2 V to +24 V at a 5 V Supply Voltage Operating Temperature Range Die: 40 C to +150 C 8-Lead SOIC: 40 C to +125 C Supply Voltage Range: 4.7 V to 12 V Low-Pass Filter (One Pole or Two Pole) EXCELLENT AC AND DC PERFORMANCE 15 V/ C Max Offset Drift 20 ppm/ C Max Gain Drift 80 dB CMRR Min DC to 10 kHz PLATFORMS Transmission Control Diesel Injection Control Engine Management Semi-Active Suspension Control Vehicle Dynamics Control GENERAL DESCRIPTION
IN I N 200k +
100k G = X10 +IN A1 IN 200k
A G = X2 +IN 2 IN
AD8200
OUT 1 10k
0k
NC = NO CONNECT
GND
The AD8200 is a single-supply difference amplifier for amplifying and low-pass filtering small differential voltages in the presence of a large common-mode voltage. The input CMV range extends from 2 V to +24 V at a typical supply voltage of 5 V. The AD8200 is offered in die and packaged form. Both package options are specified over wide temperature ranges, making the AD8200 well suited for use in many automotive platforms. The SOIC package is specified over a temperature range of 40°C to +125°C. The die is specified from 40°C to +150°C.
Automotive platforms demand precision components for better system control. The AD8200 provides excellent ac and dc performance that keeps errors to a minimum in the user's system. Typical offset and gain drift in the SOIC package are 6 µV/°C and 10 ppm/°C, respectively. The device also delivers a minimum CMRR of 80 dB from dc to 10 kHz. The AD8200 features an externally accessible 100 k resistor at the output of the preamp A1, which can be used for low-pass filter applications, and for establishing gains other than 20.
CLAMP DIODE
INDUCTIVE LOAD
5V OUTPUT BATTERY 14V 4 TERM SHUNT
A2
POWER DEVICE
5V OUTPUT
BATTERY
14V 4 TERM SHUNT
+IN NC +VS OUT
+IN NC +VS OUT
AD8200
IN GND A1
AD8200
IN GND A1 A2
POWER DEVICE CLAMP DIODE INDUCTIVE LOAD
COMMON
NC = NO CONNECT
COMMON
NC = NO CONNECT
Figure 1. High-Line Current Sensor
Figure 2. Low-Line Current Sensor
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000
AD8200SPECIFICATIONS
SINGLE SUPPLY (T = 25 C, V = 5 V, V
A S CM
= 0 V, RL = 10 k , Pin 5 to ground, unless otherwise noted.)
Min 20 1 10 AD8200 SOIC Typ Max Min 20 1 25 1 12 AD8200 DIE Typ Max Unit
Parameter SYSTEM GAIN Initial Error vs. Temperature OFFSET VOLTAGE Offset Voltage (RTI) vs. Temperature INPUT Input Impedance Differential Common-Mode CMV Common-Mode Rejection1
Condition
VO 0.1 V dc
+1 20 +1 15
+1 30 +1 25
% p p m /° C mV µV/°C
VCM = 0.15 V
1 6
Continuous VCM = 10 V f = 1 kHz f = 10 kHz2
320 160 2 80 80 10 1 0.02 97
400 200
480 240 +24
320 160 2 80 80 10 1 0.02 97
400 200
480 240 +24
k k V dB dB
PREAMPLIFIER Gain Gain Error Output Voltage Range Output Resistance OUTPUT BUFFER Gain Gain Error Output Voltage Range Output Resistance DYNAMIC RESPONSE 3 dB Bandwidth Slew Rate NOISE 0.1 Hz to 10 Hz Spectral Density, 1 kHz, RTI POWER SUPPLY Operating Range Quiescent Current vs. Temp PSRR TEMPERATURE RANGE For Specified Performance
100 2
+1 4.8 103
100 2
+1 4.8 103
% V k
1 0.02 2 30 50 0.22 10 300 4.7 VO = 0.1 V dc VS = 4.7 V to 12 V 75 40 0.25 80
+1 4.8
1 0.02 2 30 50 0.22 10 300
+1 4.8
% V kHz V/µs µV p-p nV/H z
12 1
4.7 75 0.25 80
12 1
V mA dB °C
+125
40
+150
NOTES 1 Source Imbalance < 2 . 2 The AD8200 preamplifier exceeds 80 dB CMRR at 10 kHz. However, since the signal is available only by way of a 100 k resistor, even the small amounts of pinto-pin capacitance between Pins 1, 8 and 3, 4 may couple an input common-mode signal larger than the greatly attenuated preamplifier output. The effect of pin-topin coupling may be neglected in all applications using filter capacitors at Node 3. Specifications subject to change without notice.
2
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AD8200
ABSOLUTE MAXIMUM RATINGS* PIN CONFIGURATION
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.5 V Transient Input Voltage (300 ms) . . . . . . . . . . . . . . . . . . 44 V Continuous Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . 35 V Reversed Supply Voltage Protection . . . . . . . . . . . . . . . 0.3 V Operating Temperature . . . . . . . . . . . (Die) 40°C to +150°C . . . . . . . . . (SOIC) 40°C to +125°C Storage Temperature . . . . . . . . . . . . . . . . . . 65°C to +150°C Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite Lead Temperature Range (Soldering 60 sec) . . . . . . . . 300°C
*Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; the functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
IN 1 GND 2 A1
8 +IN
AD8200
TOP VIEW
7 NC
3 (Not to Scale) 6 +V S 5 OUT
A2 4
NC = NO CONNECT
ORDERING GUIDE
Model AD8200R AD8200CHIPS
Temperature Range 40°C to +125°C 40°C to +150°C
Package Description Plastic SOIC
Package Option SO-8 DIE Form
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8200 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
METALLIZATION PHOTOGRAPH
+VS
6
5 +IN 8
OUT
IN
1
4
A2
2
3
GND
A1
REV. 0
3
AD8200Typical Performance Characteristics noted.)
30 0
(TA = 25 C, VS = 5 V, VCM = 0 V, RL = 10 k
unless otherwise
30
NEGATIVE COMMON-MODE RANGE Volts
POSITIVE COMMON-MODE RANGE Volts
25 20 15
GAIN dB
25
+VCM
2
20
4
10 5 0 5 10 15 20 1k 10k 100k FREQUENCY Hz 1M
15 VCM
6
10
8
5
10
0 2 3 4 SUPPLY VOLTAGE Volts 5
12
TPC 1. Input Common-Mode Range vs. Supply
TPC 4. Gain vs. Frequency
0 5 RL =
100 95 90 85
OUTPUT VOLTAGE mV
10
CMRR dB
RL = 10k TO GND 2
15
80 75 70 65 60 55
20 25
30 35
4 3 SUPPLY VOLTAGE Volts
5
50 10
100
1k 10k FREQUENCY Hz
100k
1M
TPC 2. Output Voltage VS vs. Supply
TPC 5. Common-Mode Rejection vs. Frequency
100 90 4
OUTPUT VOLTAGE Volts
80 70
PSRR dB
3
60 50 40 30
2
1
20 10
0 10 5
100 1k LOAD RESISTANCE
10k
0 10
100
1k FREQUENCY Hz
10k
100k
TPC 3. Output Voltage Swing vs. Load Resistance
TPC 6. Power Supply Rejection vs. Frequency
4
REV. 0
AD8200
TEK RUN: 2.5MS/s HI RES
TEK RUN: 2.5MS/s AVERAGE
VOUT, RL = 10k
1 VOUT, RL = 10k
1
T VIN
MAGNIFIED VOUT 3 2 VIN CH1 1V CH 2 10mV M 20 s CH1 CH3 100mV 1.36V
2 CH1 500mV CH2 50mV M 20 s CH1 1.5V
TPC 7. Pulse Response
TPC 8. Settling Time
THEORY OF OPERATION
The AD8200 consists of a preamp and buffer arranged as shown in Figure 3. Like-named resistors have equal values. The preamp incorporates a dynamic bridge (subtractor) circuit. Identical networks (within the shaded areas), consisting of RA, RB, RC, and RG, attenuate input signals applied to Pins 1 and 8. Note that when equal amplitude signals are asserted at inputs 1 and 8, and the output of A1 is equal to the common potential (i.e., zero), the two attenuators form a balanced-bridge network. When the bridge is balanced, the differential input voltage at A1 and thus its output, will be zero. Any common-mode voltage applied to both inputs will keep the bridge balanced and the A1 output at zero. Because the resistor networks are carefully matched, the common-mode signal rejection approaches this ideal state. However, if the signals applied to the inputs differ, the result is a difference at the input to A1. A1 responds by adjusting its output to drive RB, by way of RG, to adjust the voltage at its inverting input until it matches the voltage at its noninverting input. By attenuating voltages at Pins 1 and 8, the amplifier inputs are held within the power supply range, even if Pin 1 and Pin 8 input levels exceed the supply, or fall below Common (Ground.) The input network also attenuates normal (differential) mode voltages. RC and RG form an attenuator that scales A1 feedback, forcing large output signals to balance relatively small differential inputs. The resistor ratios establish the preamp gain at ten. Because the differential input signal is attenuated, and then amplified to yield an overall gain of ten, the amplifier A1 operates at a higher noise gain, multiplying deficiencies such as input offset voltage and noise with respect to Pins 1 and 8.
+IN IN
To minimize these errors while extending the common-mode range, a dedicated feedback loop is employed to reduce the range of common-mode voltage applied to A1, for a given overall range at the inputs. By offsetting the range of voltage applied to the compensator, the input common-mode range is also offset to include voltages more negative than the power supply. Amplifier A3 detects the common-mode signal applied to A1 and adjusts the voltage on the matched RCM resistors to reduce the common-mode voltage range at the A1 inputs. By adjusting the common voltage of these resistors, the common-mode input range is extended while, at the same time, the normal mode signal attenuation is reduced, leading to better performance referred to input. The output of the dynamic bridge taken from A1 is connected to Pin 3 by way of a 100 k series resistor, provided for lowpass filtering and gain adjustment. The resistors in the input networks of the preamp and the buffer feedback resistors are ratio-trimmed for high accuracy. The output of the preamp drives a gain-of-two buffer-amplifier A2, implemented with carefully matched feedback resistors RF. The two-stage system architecture of the AD8200 enables the user to incorporate a low-pass filter prior to the output buffer. By separating the gain into two stages, a full-scale rail-to-rail signal from the preamp can be filtered at Pin 3, and a half-scale signal resulting from filtering can be restored to full scale by the output buffer amp. The source resistance seen by the inverting input of A2 is approximately 100 k, to minimize the effects of A2's input bias current. However, this current is quite small and errors resulting from applications that mismatch the resistance are correspondingly small.
APPLICATIONS
RA
R
A
100k A1 (TRIMMED) RCM RCM A3 RF RG A2 RF
The AD8200 difference amplifier is intended for applications where it is required to extract a small differential signal in the presence of large common-mode voltages. The input resistance is nominally 200 k, and the device can tolerate common-mode voltages higher than the supply voltage and lower than ground. The open collector output stage will source current to within 20 mV of ground.
RB RG RC
RB RC
AD8200
COM
Figure 3. Simplified Schematic
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