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Details, datasheet, quote on part number:AD8315ARM
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Datasheet text preview:
50 dB GSM PA Controller AD8315
FEATURES Complete RF Detector/Controller Function >50 dB Range at 0.9 GHz (49 dBm to +2 dBm re 50 ) Accurate Scaling from 0.1 GHz to 2.5 GHz Temperature-Stable Linear-in-dB Response Log Slope of 23 mV/dB, Intercept at 60 dBm at 0.9 GHz True Integration Function in Control Loop Low Power: 20 mW at 2.7 V, 38 mW at 5 V Power Down to 10.8 W APPLICATIONS Single, Dual, and Triple Band Mobile Handset (GSM, DCS, EDGE) Transmitter Power Control
Its high sensitivity allows control at low signal levels, thus reducing the amount of power that needs to be coupled to the detector. For convenience, the signal is internally ac-coupled. This high-pass coupling, with a corner at approximately 0.016 GHz, determines the lowest operating frequency. Thus, the source may be dc grounded. The AD8315 provides a voltage output, VAPC, that has the voltage range and current drive to directly connect to most handset power amplifiers' gain control pin. VAPC can swing from 250 mV above ground to within 200 mV below the supply voltage. Load currents of up to 6 mA can be supported. The setpoint control input is applied to pin VSET and has an operating range of 0.25 V1.4 V. The associated circuit determines the slope and intercept of the linear-in-dB measurement system; these are nominally 23 mV/dB and 60 dBm for a 50 W termination (73 dBV) at 0.9 GHz. Further simplifying the application of the AD8315, the input resistance of the setpoint interface is over 100 MW, and the bias current is typically 0.5 mA. The AD8315 is available in MSOP and lead frame chip scale (LFCSP) packages and consumes 8.5 mA from a 2.7 V to 5.5 V supply. When powered down, the sleep current is 4 mA.
PRODUCT DESCRIPTION
The AD8315 is a complete low cost subsystem for the precise control of RF power amplifiers operating in the frequency range 0.1 GHz2.5 GHz and over a typical dynamic range of 50 dB. It is intended for use in cellular handsets and other battery-operated wireless devices. The log amp technique provides a much wider measurement range and better accuracy than controllers using diode detectors. In particular, its temperature stability is excellent over a specified range of 30C to +85C.
FUNCTIONAL BLOCK DIAGRAM
VPOS ENBL
LOW NOISE GAIN BIAS
LOW NOISE BAND GAP REFERENCE
OUTPUT ENABLE DELAY 1.35 VAPC
DET RFIN 10dB
DET
DET
DET
DET
HI-Z LOW NOISE (25nV/ Hz) RAIL-TO-RAIL BUFFER
10dB
10dB
10dB V-I
FLTR VSET 23mV/dB 250mV to 1.4V = 50dB
OFFSET COMP'N COMM
INTERCEPT POSITIONING
REV. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
AD8315SPECIFICATIONS (V = 2.7 V, T = 25 C, 52.3
S
termination on RFIN, unless otherwise noted.)
Min 0.1 57 44 21.5 79 66 Typ Max 2.5 11 +2 25.5 64 51 Unit GHz dBV dBm mV/dB dBV dBm kW pF 0.3 2.6 VPOS 0.1 5/200 25 130 30 13 150 0.25 43.5 100 16 1.4 V V V V V mA/mA nV÷H z n V /÷ H z MHz V/ms ns V dB/V kW V/ms V mA V ms ms ms ns
Parameter OVERALL FUNCTION Frequency Range1 Input Voltage Range Equivalent dBm Range Logarithmic Slope2 Logarithmic Intercept2 Equivalent dBm Level RF INPUT INTERFACE Input Resistance3 Input Capacitance3 OUTPUT Minimum Output Voltage Maximum Output Voltage vs. Temperature4 General Limit Output Current Drive Output Buffer Noise Output Noise Small Signal Bandwidth Slew Rate Response Time SETPOINT INTERFACE Nominal Input Range Logarithmic Scale Factor Input Resistance Slew Rate ENABLE INTERFACE Logic Level to Enable Power Input Current when Enable High Logic Level to Disable Power Enable Time Disable Time Power-On/Enable Time
Conditions To Meet All Specifications ± 1 dB Log Conformance, 0.1 GHz 0.1 GHz 0.1 GHz Pin RFIN 0.1 GHz 0.1 GHz Pin VAPC VSET £ 200 mV, ENBL High ENBL Low RL 800 W 85C, VPOS = 3 V, IOUT = 6 mA 2.7 V £ VPOS £ 5.5 V, RL = · Source/Sink RF Input = 2 GHz, 0 dBm, fNOISE = 100 kHz, CFLT = 220 pF 0.2 V to 2.6 V Swing 10%90%, 1.2 V Step (VSET), Open Loop5 FLTR = Open, Refer to TPC 24 Pin VSET Corresponding to Central 50 dB
24 70 57 2.8 0.9
0.25 2.45 2.54
0.27 0.02
Pin ENBL 1.8 20 Time from ENBL High to VAPC within 1% of Final Value, VSET £ 200 mV, Refer to TPC 21 Time from ENBL Low to VAPC within 1% of Final Value, VSET £ 200 mV, Refer to TPC 21 Time from VPOS/ENBL High to VAPC within 1% of Final Value, VSET £ 200 mV, Refer to TPC 26 Time from VPOS/ENBL Low to VAPC within 1% of Final Value, VSET £ 200 mV, Refer to TPC 26 Pin VPOS 2.7 ENBL High 30C £ TA £ +85C ENBL Low 30C £ TA £ +85C 8.5 4 5.5 10.7 12.9 10 13 V mA mA mA mA 4 8 2 0.8 5 9 3 VP O S
100
200
POWER INTERFACE Supply Voltage Quiescent Current Over Temperature Disable Current6 Over Temperature
NOTES 1 Operation down to 0.02 GHz is possible. 2 Mean and Standard Deviation specifications are available in Table I. 3 See TPC 9 for plot of Input Impedance vs. Frequency. 4 This parameter is guaranteed but not tested in production. Limit is 3 sigma from the mean. 5 Response time in a closed-loop system will depend upon the filter capacitor (C FLT) used and the response of the variable gain element. 6 This parameter is guaranteed but not tested in production. Maximum specified limit on this parameter is the +6 sigma value. Specifications subject to change without notice.
2
REV. B
AD8315
Table I. Typical Specifications at Selected Frequencies at 25 C (Mean and Sigma)
Frequency GHz 0.1 0.9 1.9 2.5
Slope mV/dB Mean Sigma 23.8 23.2 22.2 22.3 0.3 0.4 0.3 0.4
Intercept dBV Mean Sigma 70.1 72.6 73.8 75.6 1.8 1.8 1.6 1.5
1 dB Dynamic Range Low Point dBV High Point dBV Mean Sigma Mean Sigma 57.7 61.0 62.9 64.0 1.3 1.3 0.9 1.1 10.6 11.2 18.5 20.0 0.8 0.8 1.7 1.7
ABSOLUTE MAXIMUM RATINGS*
PIN CONFIGURATION
Supply Voltage VPOS . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5 V Temporary Overvoltage VPOS (100 cycles, 2 seconds duration, ENBL Low) . . . . . . . 6.3 V VAPC, VSET, ENBL . . . . . . . . . . . . . . . . . . . . . . 0 V, VPOS RFIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 dBm Equivalent Voltage . . . . . . . . . . . . . . . . . . . . . . . . 1.6 V rms Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . . 60 mW qJA (MSOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200C/W qJA (LFCSP, Paddle Soldered) . . . . . . . . . . . . . . . . . . 80C/W qJA (LFCSP, Paddle not Soldered) . . . . . . . . . . . . . 200C/W Maximum Junction Temperature . . . . . . . . . . . . . . . . . 125C Operating Temperature Range . . . . . . . . . . . 40C to +85C Storage Temperature Range . . . . . . . . . . . . 65C to +150C Lead Temperature Range (Soldering 60 sec) MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300 C L F C S P . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 0 C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RFIN 1 ENBL VSET
2 3
8
VPOS
VAPC TOP VIEW 6 NC (Not to Scale)
7 5
AD8315
FLTR 4
COMM
NC = NO CONNECT
PIN FUNCTION DESCRIPTIONS
Pin No. 1 2 3 4 5 6 7 8
Mnemonic RFIN ENBL VSET FLTR COMM NC VAPC VPOS
Function RF Input Connect to VPOS for Normal Operation Connect pin to ground for Disable Mode Setpoint Input. Nominal input range 0.25 V to 1.4 V. Integrator Capacitor. Connect between FLTR and COMM. Device Common (Ground) No Connection Output. Control voltage for gain control element. Positive Supply Voltage: 2.7 V to 5.5 V
ORDERING GUIDE
Model AD8315ARM AD8315ARM-REEL AD8315ARM-REEL7 AD8315-EVAL AD8315ACP-REEL AD8315ACP-REEL7 AD8315ACP-EVAL
Temperature Range 30C to +85C
Package Descriptions Tube, 8-Lead MSOP 13" Tape and Reel 7" Tape and Reel MSOP Evaluation Board 13" Tape and Reel, 8-Lead LFCSP 7" Tape and Reel LFCSP Evaluation Board
Package Option RM-8
Branding Information J7A
30C to +85C
CP-8
J7A
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8315 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. B
3
AD8315 Typical Performance Characteristics
1 0
RF INPUT AMPLITUDE dBV
23 13
RF INPUT AMPLITUDE dBm
4 3 2.5GHz 2 0.1GHz 1.9GHz 0.9GHz
10 20 0.1GHz 30 40 0.9GHz 50 60 1.9GHz 70 80 0.2 2.5GHz
3 7 17 27 37 47 57 67 0.4 0.6 0.8 1.0 VSET V 1.2 1.4
ERROR dB
1 0 1 2 3 4 0.2
0.4
0.6
0.8 1.0 VSET V
1.2
1.4
1.6
TPC 1. Input Amplitude vs. VSET
TPC 4. Log Conformance vs. VSET
10 0 (+3dBm) 10 RF INPUT AMPLITUDE dBV +85 C 20 30 +25 C 40 50 (47dBm) 60 70 0.1 ERROR AT +85 C AND 30 C BASED ON DEVIATION FROM SLOPE AND INTERCEPT AT +25 C 0.3 0.5 0.7 0.9 VSET V 1.1 1.3 30 C +85 C 30 C +25 C
4 3 2 ERROR dB 1 0 1 2 3 4 1.5
10 0 (+3dBm) 10
RF INPUT AMPLITUDE dBV
4 3 2 +85 C 30 C
ERROR dB
20 30 40 50 +25 C +25 C
1 0 1 2
(47dBm) 60
+85 C 30 C 0.3 0.5
ERROR AT +85 C AND 30 C BASED ON DEVIATION FROM SLOPE AND INTERCEPT AT +25 C 0.7 0.9 VSET V 1.1 1.3
3 4 1.5
70 0.1
TPC 2. Input Amplitude and Log Conformance vs. VSET at 0.1 GHz
TPC 5. Input Amplitude and Log Conformance vs. VSET at 1.9 GHz
10 0 (+3dBm) 10 30 C +25 C +85 C 20 30 40 50 (47dBm) 60 70 0.1 ERROR AT +85 C AND 30 C BASED ON DEVIATION FROM SLOPE AND INTERCEPT AT +25 C 0.3 0.5 0.7 0.9 VSET V 1.1 1.3 +25 C 30 C
+85 C
4 3 2
10 0 (+3dBm) 10 RF INPUT AMPLITUDE dBV 30 C 20 30 40 50 (47dBm) 60 70 0.1 +25 C +85 C 30 C 0.3 0.5 ERROR AT +85 C AND 30 C BASED ON DEVIATION FROM SLOPE AND INTERCEPT AT +25 C 0.7 0.9 VSET V 1.1 1.3 +25 C +85 C
4 3 2 ERROR dB 1 0 1 2 3 4 1.5
RF INPUT AMPLITUDE dBV
0 1 2 3 4 1.5
TPC 3. Input Amplitude and Log Conformance vs. VSET at 0.9 GHz
ERROR dB
1
TPC 6. Input Amplitude and Log Conformance vs. VSET at 2.5 GHz
4
REV. B
AD8315
4 3 2 30 C
4 3 2
ERROR dB
30 C
ERROR dB
1 0 1 2 3 4 80 +85 C ERROR AT +85 C AND 30 C BASED ON DEVIATION FROM SLOPE AND INTERCEPT AT +25 C 70 60 50 40 30 20 RF INPUT AMPLITUDE dBV (47dBm) 10 (+3dBm) 0
1 0 1 2 3 4 80 +85 C ERROR AT +85 C AND 30 C BASED ON DEVIATION FROM SLOPE AND INTERCEPT AT +25 C 70 50 40 30 20 60 RF INPUT AMPLITUDE dBV (47dBm) 10 (+3dBm) 0
TPC 7. Distribution of Error at Temperature after Ambient Normalization vs. Input Amplitude, 3 Sigma to Either Side of Mean, 0.1 GHz
TPC 10. Distribution of Error at Temperature after Ambient Normalization vs. Input Amplitude, 3 Sigma to Either Side of Mean, 1.9 GHz
4 3 2
4 3 2
ERROR dB
30 C
30 C
ERROR dB
1 0 1 2 3 4 80 85 C ERROR AT +85 C AND 30 C BASED ON DEVIATION FROM SLOPE AND INTERCEPT AT +25 C 70 60 50 40 30 20 RF INPUT AMPLITUDE dBV (47dBm) 10 (+3dBm) 0
1 0 1 2 3 4 80 ERROR AT +85 C AND 30 C BASED ON DEVIATION FROM SLOPE AND INTERCEPT AT +25 C 70 +85 C
50 40 30 20 60 RF INPUT AMPLITUDE dBV (47dBm)
10 (+3dBm)
0
TPC 8. Distribution of Error at Temperature after Ambient Normalization vs. Input Amplitude, 3 Sigma to Either Side of Mean, 0.9 GHz
TPC 11. Distribution of Error at Temperature after Ambient Normalization vs. Input Amplitude, 3 Sigma to Either Side of Mean, 2.5 GHz
3000 2700 2400 2100 200 400 FREQUENCY MSOP Chip Scale (LFCSP) j R jX (GHz) R jX j 600 2900 1900 2700 1500 0.1 700 j240 0.9 730 j220 800 130 j80 1.9 460 j130 170 j70 2.5 440 j110 1000 X X (MSOP) R (LFCSP) 1200 1400 1600 1800 R (MSOP) 0 0 0.5 1 1.5 FREQUENCY GHz 2 2000 2.5
10
0
8
SUPPLY CURRENT mA
RESISTANCE
RR EACTANCE
1800 X (LFCSP) 1500 1200 900 600 300
6
4 DECREASING VENBL 2 INCREASING VENBL
0 1.3
1.4
1.5 VENBL V
1.6
1.7
TPC 9. Input Impedance
TPC 12. Supply Current vs. VENBL
REV. B
5
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