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Details, datasheet, quote on part number:AD8316ARM
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Datasheet text preview:
Dual Output GSM PA Controller AD8316
FEATURES Complete RF Detector/Controller Function Selectable Dual Outputs 49 dB Range at 0.9 GHz (47.6 dBm to +1.5 dBm re 50 Accurate Scaling from 0.1 GHz to 2.5 GHz Temperature-Stable Linear-in-dB Response Log Slope of 22 mV/dB True Integration Function in Control Loop Low Power: 23 mW at 2.7 V Power-Down to 11 mW )
power control signal is required for each band. The logarithmic amplifier technique provides a much wider measurement range and better accuracy than is possible using controllers based on diode detectors. In particular, multiband and multimode cellular designs can benefit from the temperature-stable (30°C to +85°C) operation over all cellular telephony frequencies. Its high sensitivity allows control at low input signal levels, thus reducing the amount of power that needs to be coupled to the detector. The selected output, OUT1 or OUT2, has the voltage range and current drive to directly connect to the gain control pin of most handset power amplifiers; the deselected output is pulled low to ensure that the inactive PA remains off. Each output has a dedicated integrating filter capacitor that allows separate control loop settings for each PA. OUT1 and OUT2 can swing from 125 mV above ground to within 100 mV below the supply voltage. Load currents of up to 12 mA can be supported. The setpoint control input applied to pin VSET has an operating range of 0.25 V to 1.4 V. The input resistance of the setpoint interface is over 100 M, and the bias current is typically 0.5 µA. The AD8316 is available in 10-lead MSOP and 16-lead chip scale (LFCSP) packages and consumes 8.5 mA from a 2.7 V to 5.5 V supply. When it is powered down, the sleep current is 4 µA.
APPLICATIONS Single-Band, Dual-Band, and Triband Mobile Handsets (GSM, DCS, PCS, EDGE) Wireless Terminal Devices Transmitter Power Control GENERAL DESCRIPTION
The AD8316 is a complete, low cost subsystem for the precise control of dual RF power amplifiers (PAs) operating in the frequency range 0.1 GHz to 2.5 GHz and over a typical dynamic range of 50 dB. The device is a dual-output version of the AD8315 and intended for use in dual-band or triband cellular handsets and other battery-operated wireless devices where a separate
FUNCTIONAL BLOCK DIAGRAM
VPOS ENBL BSEL DET RFIN 10dB 10dB 10dB 10dB DET DET DET DET LOW NOISE GAIN BIAS LOW NOISE BAND GAP REFERENCE OUTPUT ENABLE DELAY FLT1 HI-Z 1.35 OUT1
HI-Z
1.35
OUT2 FLT2
OFFSET COMPENSATION COMM
INTERCEPT POSITIONING
VI
VSET
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
AD8316SPECIFICATIONS (V
Parameter OVERALL FUNCTION Frequency Range1 Input Voltage Range Equivalent dBm Range Logarithmic Slope2, 3 Logarithmic Intercept2, 3 Equivalent dBm Level RF INPUT INTERFACE Input Resistance4 Input Capacitance4 OUTPUTS Minimum Output Voltage Maximum Output Voltage General Limit Output Current Drive Output Buffer Noise Output Noise Small Signal Bandwidth Slew Rate Full-Scale Response Time SETPOINT INTERFACE Nominal Input Range Logarithmic Scale Factor Input Resistance Slew Rate ENABLE INTERFACE Logic Level to Enable Power Input Current when Enable High Logic Level to Disable Power Enable Time Disable Time Power-On/Enable Time Power-Off/Disable Time BAND SELECT INTERFACE Logic Level to Enable OUT1 Input Current when BSEL High Logic Level to Enable OUT2 POWER INTERFACE Supply Voltage Quiescent Current Over Temperature Disable Current6 Over Temperature Conditions
POS
= 2.7 V, TA = 25 C, 52.3
on RFIN, unless otherwise noted.)
Min 0.1 58.6 45.6 20.5 68 55 Typ Max 2.5 10 +3 24.5 78 65 Unit GHz dBV dBm mV/dB dBV dBm k pF 0.25 2.6 VPOS 0.1 12 25 100 30 20 50 0.25 43.5 100 16 1.5 V V V V mA nV/ Hz nV/ Hz MHz V/µs ns V dB/V k V/µs V µA V µs µs µs µs
To Meet All Specifications ± 1 dB Log Conformance, 0.1 GHz 0.1 GHz 0.1 GHz Pin RFIN 0.1 GHz 0.1 GHz Pins OUT1 and OUT2 VSET 200 mV, ENBL High, RF Input 60 dBm ENBL Low RL > 800 2.7 V VPOS 5.5 V Source RF Input = 2 GHz, 0 dBm, CFLT = 220 pF, fNOISE = 400 kHz 0.2 V to 2.6 V Swing 10%90%, 250 mV Step (V SET), Open Loop5 FLTR = Open; Refer to TPC 28 Pin VSET Corresponding to Central 50 dB
22.1 74 61 2.9 1.0
0.1 2.45
0.15 0.025
Pin ENBL 1.8 20 0.8 Time from ENBL High to V APC within 1% of Final Value, CFLT = 68 pF; Refer to TPC 20 Time from ENBL Low to V APC within 1% of Final Value, CFLT = 68 pF; Refer to TPC 20 Time from VPOS/ENBL Low to V APC within 1% of Final Value, CFLT = 68 pF; Refer to TPC 25 Time from VPOS/ENBL High to V APC within 1% of Final Value, CFLT = 68 pF; Refer to TPC 25 Pin BSEL 1.8 50 0.0 Pin VPOS 2.7 ENBL High 30°C TA +85°C ENBL Low 30°C TA +85°C 8.5 3 5.5 10.7 12 10 13 V mA mA µA µA 1.7 V POS V µA V 7 3 3 4 V POS
NOTES 1 Operation down to 0.02 GHz is possible. 2 Calculated over the input range of 40 dBm to 10 dBm. 3 Mean and standard deviation specifications are in Table I. 4 See TPC 9 for plot of Input Impedance vs. Frequency. 5 Response time in a closed-loop system will depend upon the filter capacitor (C FLT) used and the response of the variable gain element. 6 This parameter is guaranteed but not tested in production. The maximum specified limit on this parameter is the +6 sigma value from characterization. Specifications subject to change without notice.
2
REV. A
AD8316
Table I. Typical Specifications at Selected Frequencies at 25°C Slope (mV/dB) Frequency (GHz) 0.1 0.9 1.9 2.5 Mean 22.1 22.2 21.6 21.3 Standard Deviation 0.3 0.3 0.3 0.3 Intercept (dBm) Mean 61.0 62.2 63.1 66.0 Standard Deviation 1.5 1.5 1.5 1.6 Dynamic Range Low Point (dBm) Mean 45.6 47.6 49.2 51.5 Standard Deviation 0.7 0.6 0.8 1.1 Dynamic Range High Point (dBm) Mean 3.0 1.5 4.5 3.0 Standard Deviation 0.7 0.6 0.8 1.1
Slope and intercept calculated over the input amplitude range of 40 dBm to 10 dBm.
ABSOLUTE MAXIMUM RATINGS* Supply Voltage VPOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V OUT1, OUT2, VSET, ENBL . . . . . . . . . . . . . . . . . . . . 0 V, VPOS RFIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 dBm Equivalent Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 V Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . 100 mW JA (MSOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200°C/W JA (LFCSP, Paddle soldered) . . . . . . . . . . . . . . . . . . . . . 80°C/W JA (LFCSP, Paddle not soldered) . . . . . . . . . . . . . . . . . 130°C/W Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . 125°C Operating Temperature Range . . . . . . . . . . . . . . 40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . . . 65°C to +150°C Lead Temperature Range (Soldering 60 sec) MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C LFCSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240°C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
PIN FUNCTION DESCRIPTIONS
Pin No.
PIN CONFIGURATION 10-Lead MSOP 16-Lead LFCSP
14 COMM 16 NC 15 NC 13 NC
MSOP LFCSP
1 2 3 4 5 6 7 8 9 10 1 2 3 4 6 7 9 10, 14 11 12 5, 8, 13, 15, 16 ORDERING GUIDE
Mnemonic Function
RFIN ENBL VSET FLT1 BSEL FLT2 OUT2 COMM OUT1 VPOS NC RF Input Connect to VPOS for Normal Operation. Connect pin to ground for disable mode. Setpoint Input Integrator Capacitor for OUT1. Connect between FLT1 and COMM. Band Select. LO = OUT2, HI = OUT1. Integrator Capacitor for OUT2. Connect between FLT2 and COMM. Band 2 Output Device Common (Ground) Band 1 Output Positive Supply Voltage: 2.7 V to 5.5 V No Connection
RFIN 1 ENBL 2 VSET 3 FLT1 4 BSEL 5
10 VPOS
AD8316
TOP VIEW (NOT TO SCALE)
9 OUT1 8 COMM 7 OUT2 6 FLT2
RFIN 1 ENBL 2 VSET 3 FLT1 4
12 VPOS
AD8316
TOP VIEW (Not to Scale)
11 OUT1 10 COMM 9 OUT2
NC 5
BSEL 6
FLT2 7
NC = NO CONNECT
Model
Temperature Range Package Description
NC 8
Package Option
Brand J8A
AD8316ARM 30°C to +85°C AD8316ARM-REEL AD8316ARM-REEL7 AD8316-EVAL AD8316ACP-REEL 30°C to +85°C AD8316ACP-REEL7 AD8316ACP-EVAL
Tube, 10-Lead MSOP RM-10 13" Tape and Reel MSOP 7" Tape and Reel MSOP MSOP Evaluation Board 13" Tape and Reel, 16-Lead LFCSP CP-16 7" Tape and Reel LFCSP LFCSP Evaluation Board
J8A
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8316 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
REV. A
3
AD8316 Typical Performance Characteristics
73 1.6 63 INPUT AMPLITUDE dBV 53 43 33 23 13 3
73 4 3 1.9GHz 63 INPUT AMPLITUDE dBV 53 43 33 23 13 3
1.4 0.9GHz 1.2
VSET V
1.9GHz 0.1GHz
2
1.0 0.8 1.9GHz
ERROR dB
2.5GHz
1 0 2.5GHz 1 0.9GHz 2 3 4 60
0.6 0.1GHz 0.4 0.2 60
50
40 30 20 10 INPUT AMPLITUDE dBm
0
10
50
40
30
20
10
0
10
INPUT AMPLITUDE dBm
TPC 1. VSET vs. Input Amplitude
TPC 4. Log Conformance vs. Input Amplitude at Selected Frequencies
73 1.6 1.4 1.2
63
INPUT AMPLITUDE dBV 53 43 33 23
13 30 C
3 4 3 +25 C 2
73 1.6 1.4
63
INPUT AMPLITUDE dBV 53 43 33 23
13
3 4 3
+25 C 1.2 +85 C 2 1 30 C 0 1 2 3 +25 C 50 30 C 40 30 20 10 0 4 10
+85 C 1.0
+85 C
ERROR dB
VSET V
0.8 +25 C 0.6 0.4 0.2 0 60
0 1 2 3 4 10
VSET V
30 C
0.8
0.6 0.4 0.2
+85 C
50
40
30
20
10
0
0 60
INPUT AMPLITUDE dBm
INPUT AMPLITUDE dBm
TPC 2. VSET and Log Conformance vs. Input Amplitude at 0.1 GHz
TPC 5. VSET and Log Conformance vs. Input Amplitude at 1.9 GHz
73 1.6 1.4 1.2 1.0
VSET V
63
INPUT AMPLITUDE dBV 53 43 33 23 +85 C
13
3 4 3 2
ERROR dB
73 1.6 1.4 1.2
63
INPUT AMPLITUDE dBV 53 43 33 23
13
3 4 3 2
+25 C
+25 C 1.0
VSET V
+85 C
ERROR dB
1 30 C 0 1 2 3 +25 C 30 C 40 30 20 10 0 4 10
1 0 30 C +85 C 1 2 3 +25 C 50 30 C 40 30 20 10 0 4 10
0.8 0.6 0.4 0.2
0.8 0.6 0.4 0.2 0 60
+85 C
0 60
50
INPUT AMPLITUDE dBm
INPUT AMPLITUDE dBm
TPC 3. VSET and Log Conformance vs. Input Amplitude at 0.9 GHz
TPC 6. VSET and Log Conformance vs. Input Amplitude at 2.5 GHz
4
REV. A
ERROR dB
1
1.0
AD8316
73 4 3 2 63 INPUT AMPLITUDE dBV 53 43 33 23 13 3 73 4 3 +85 C 2 63 INPUT AMPLITUDE dBV 53 43 33 23 13 3
+85 C
ERROR dB
0 1 2 3 4 60 30 C
ERROR dB
1
1 0 1 2 3 4 60
30 C
50
40
30
20
10
0
10
50
40
30
20
10
0
10
INPUT AMPLITUDE dBm
INPUT AMPLITUDE dBm
TPC 7. Distribution of Error at Temperature after Ambient Normalization vs. Input Amplitude, 3 Sigma to Either Side of Mean, 0.1 GHz
TPC 10. Distribution of Error at Temperature after Ambient Normalization vs. Input Amplitude, 3 Sigma to Either Side of Mean, 1.9 GHz
73 4 3
63
INPUT AMPLITUDE dBV 53 43 33 23
13
3
73 4 3
63
INPUT AMPLITUDE dBV 53 43 33 23
13
3
+85 C 2
ERROR dB
2
+85 C
0 1 2 3 4 60 30 C
ERROR dB
1
1 0 1 2 30 C 3 4 60
50
40
30
20
10
0
10
50
40
30
20
10
0
10
INPUT AMPLITUDE dBm
INPUT AMPLITUDE dBm
TPC 8. Distribution of Error at Temperature after Ambient Normalization vs. Input Amplitude, 3 Sigma to Either Side of Mean, 0.9 GHz
TPC 11. Distribution of Error at Temperature after Ambient Normalization vs. Input Amplitude, 3 Sigma to Either Side of Mean, 2.5 GHz
3100 2800 2500 2200 1 RESISTANCE 1900 X (LFCSP) 1600 1300 000 R (CSP) 700 400 100 0 0.5 1.0 1.5 2.0 FREQUENCY GHz R (MSOP) R X (MSOP)
FREQ (GHz) 0.1 0.9 1.9 2.5
0 200
CHIP-SCALE (LFCSP) 400 R jX R jX 3100 j1220 2630 j1800 600 600 j194 1000 j270 320 j134 620 j130 110 j86 435 j110 800
8
MSOP
SUPPLY CURRENT mA
6 INCREASING VENBL 4 DECREASING VENBL 2
1000 1200 1400 1600 1800 2000 2.5
REACTX ANCE
0 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 VENBL V
TPC 9. Input Impedance vs. Frequency
TPC 12. Supply Current vs. VENBL
REV. A
5
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