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Details, datasheet, quote on part number:AD835AN
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| Part: | AD835AN |
| Category: | Analog & Mixed-Signal Processing => Analog Multipliers |
| Description: | 250 Mhz, Voltage Output 4-Quadrant Multiplier |
| Company: | Analog Devices |
| Datasheet: | Download AD835AN datasheet File size : 206 kB |
| Request For quote: | Find where to buy AD835AN
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Datasheet text preview:
a
FEATURES Simple: Basic Function is W = XY + Z Complete: Minimal External Components Required Very Fast: Settles to 0.1% of FS in 20 ns DC-Coupled Voltage Output Simplifies Use High Differential Input Impedance X, Y and Z Inputs Low Multiplier Noise: 50 nV/ Hz APPLICATIONS Very Fast Multiplication, Division, Squaring Wideband Modulation and Demodulation Phase Detection and Measurement Sinusoidal Frequency Doubling Video Gain Control and Keying Voltage Controlled Amplifiers and Filters
X1 X2
250 MHz, Voltage Output 4-Quadrant Multiplier AD835
FUNCTIONAL BLOCK DIAGRAM
X = X1 X2
AD835
XY
XY + Z
+1
W OUTPUT
Y1 Y2 Y = Y1 Y2
Z INPUT
PRODUCT DESCRIPTION
PRODUCT HIGHLIGHTS
The AD835 is a complete four-quadrant voltage output analog multiplier fabricated on an advanced dielectrically isolated complementary bipolar process. It generates the linear product of its X and Y voltage inputs, with a 3 dB output bandwidth of 250 MHz (a small signal rise time of 1 ns). Full-scale (1 V to +1 V) rise/fall times are 2.5 ns (with the standard RL of 150 ) and the settling time to 0.1% under the same conditions is typically 20 ns. Its differential multiplication inputs (X, Y) and its summing input (Z) are at high impedance. The low impedance output voltage (W) can provide up to ± 2.5 V and drive loads as low as 25 . Normal operation is from ± 5 V supplies. Though providing state-of-the-art speed, the AD835 is simple to use and versatile. For example, as well as permitting the addition of a signal at the output, the Z input provides the means to operate the AD835 with voltage gains up to about ×10. In this capacity, the very low product noise of this multiplier (50 nVHz) makes it much more useful than earlier products. The AD835 is available in an 8-pin plastic mini-DIP package (N) and an 8-pin SOIC (R) and is specified to operate over the 40°C to +85°C industrial temperature range.
1. The AD835 is the first monolithic 250 MHz four quadrant voltage output multiplier. 2. Minimal external components are required to apply the AD835 to a variety of signal processing applications. 3. High input impedances (100 k 2 pF) make signal source loading negligible. 4. High output current capability allows low impedance loads to be driven. 5. State of the art noise levels achieved through careful device optimization and the use of a special low noise bandgap voltage reference. 6. Designed to be easy to use and cost effective in applications which formerly required the use of hybrid or board level solutions.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. © Analog Devices, Inc., 1994 One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
AD835SPECIFICATIONS
Model
TRANSFER FUNCTION Parameter INPUT CHARACTERISTICS (X, Y) Differential Voltage Range Differential Clipping Level Low Frequency Nonlinearity vs. Temperature Common-Mode Voltage Range Offset Voltage vs. Temperature CMRR Bias Current vs. Temperature Offset Bias Current Differential Resistance Single-Sided Capacitance Feedthrough, X Feedthrough, Y DYNAMIC CHARACTERISTICS 3 dB Small-Signal Bandwidth 0.1 dB Gain Flatness Frequency Slew Rate Differential Gain Error, X Differential Phase Error, X Differential Gain Error, Y Differential Phase Error, Y Harmonic Distortion Settling Time, X or Y SUMMING INPUT (Z) Gain 3 dB Small-Signal Bandwidth Differential Input Resistance Single Sided Capacitance Maximum Gain Bias Current OUTPUT CHARACTERISTICS Voltage Swing vs. Temperature Voltage Noise Spectral Density Offset Voltage vs. Temperature2 Short Circuit Current Scale Factor Error vs. Temperature Linearity (Relative Error)3 vs. Temperature POWER SUPPLIES Supply Voltage For Specified Performance Quiescent Supply Current vs. Temperature PSRR at Output vs. Vp PSRR at Output vs. Vn
(TA = +25 C, VS =
5 V, RL = 150
, CL 5 pF unless otherwise noted)
AD835AN/AR
W= ( X 1 X 2)(Y 1 Y 2) U +Z
Conditions VCM = 0 X = ± 1 V, Y = 1 V Y = ± 1 V, X = 1 V TMIN to TMAX1 X = ± 1 V, Y = 1 V Y = ± 1 V, X = 1 V TMIN to TMAX1 f 100 kHz; ± 1 V p-p TMIN to TMAX1
Min
Typ ±1 ± 1.4 0.3 0.1
Max
Unit V V % FS % FS % FS % FS V mV mV dB µA µA µA k pF dB dB MHz MHz V/µs % Degrees % Degrees dB dB ns
1.2
0.5 0.3 0.7 0.5 +3 20 ± 25 20 27
2.5 70
±3 10 2 100 2
X = ± 1 V, Y = 0 V Y = ± 1 V, X = 0 V 150 W = 2.5 V to +2.5 V f = 3.58 MHz f = 3.58 MHz f = 3.58 MHz f = 3.58 MHz X or Y = 10 dBm, 2nd and 3rd Harmonic Fund = 10 MHz Fund = 50 MHz To 0.1%, W = 2 V p-p From Z to W, f 10 MHz 0.990
46 60 250 15 1000 0.3 0.2 0.1 0.1 70 40 20 0.995 250 60 2 50 50 ± 2.5 50 ± 25 75 ±5 ± 0.5 75 ± 10 8 ±9 1.0 ± 1.25
X, Y to W, Z Shorted to W, f = 1 kHz
MHz k pF dB µA V V nV/ Hz mV mV mA % FS % FS % FS % FS
TMIN to TMAX1 X = Y = 0, f < 10 MHz TMIN to TMAX1 TMIN to TMAX1 TMIN to TMAX1
± 2.2 ± 2.0
± 4.5 TMIN to TMAX1 +4.5 V to +5.5 V 4.5 V to 5.5 V
±5 16
± 5.5 25 26 0.5 0.5
V mA mA %/V %/V
NOTES 1 TMIN = 40°C, TMAX = +85°C. 2 Normalized to zero at +25°C. 3 Linearity is defined as residual error after compensating for input offset, output voltage offset and scale factor errors. All min and max specifications are guaranteed. Specifications in boldface are tested on all production units at final electrical test. Specifications subject to change without notice.
2
REV. A
AD835
ABSOLUTE MAXIMUM RATINGS 1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .± 6 V Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . . . 300 mW Operating Temperature Range . . . . . . . . . . . . . 40°C to +85C Storage Temperature Range . . . . . . . . . . . . 65°C to +150°C Lead Temperature, Soldering 60 sec . . . . . . . . . . . . . . +300°C ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1500 V
NOTES 1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. 2 Thermal Characteristics: 8-Pin Plastic DIP (N): JC = 35°C/W; JA = 90°C/W 8-Pin Plastic SOIC (R): JC = 45°C/W; JA = 115°C/W.
PIN CONNECTIONS 8-Pin Plastic DIP (N) 8-Pin Plastic SOIC (R)
Y1 Y2 VN Z 1 2 3 4 8 X1 X2 VP W
AD835
TOP VIEW (Not to Scale)
7 6 5
ORDERING GUIDE
Model AD835AN AD835AR
Temperature Range 40°C to +85°C 40°C to +85°C
Package Options* N-8 R-8
*N = Plastic DIP; R = Small Outline IC Plastic Package (SOIC).
Typical Performance Characteristics
DG DP (NTSC) FIELD = 1 LINE = 18 0.00 0.06 0.11 0.4 Wfm FCC COMPOSITE 0.16 0.19 0.20
X, Y, Z CH = 0dBm RL = 150 CL 5pF
DIFFERENTIAL GAIN %
0.2 0.0 0.2 0.4 1ST 0.3 0.2 0.1 0.0 0.1 0.2 0.3 1ST 2ND 3RD 4TH MIN = 0.00 MAX = 0.06 p-p = 0.06 5TH 6TH
8 10
MAGNITUDE dB
GAIN 0 2 PHASE 4 6 90 180 90 0
2ND 0.02
3RD 0.02
4TH 0.03
5TH 0.03
6TH 0.06
0.00
DIFFERENTIAL PHASE Degrees
1M
10M 100M FREQUENCY Hz
1G
Figure 1. Typical Composite Output Differential Gain & Phase, NTSC for X Channel; f = 3.58 MHz, RL = 150
DG DP (NTSC) FIELD = 1 LINE = 18 0.00 0.01 0.00 0.3 Wfm 0.00 FCC COMPOSITE 0.01 0.20 MIN = 0.02 MAX = 0.01 p-p/MAX = 0.03
Figure 3. Gain & Phase vs. Frequency of X, Y, Z Inputs
DIFFERENTIAL GAIN %
0.2 0.1 0.0 0.1 0.3
X, Y CH = OdBm RL = 150 CL 5pF 0
MAGNITUDE dB
0.2 1ST 0.00 2ND 0.03 3RD 0.04 4TH 0.07 5TH 0.10 6TH 0.16
0.1 0.2 0.3 0.4 0.5
DIFFERENTIAL PHASE Degrees
0.20 0.10 0.00 0.10 0.20 1ST 2ND 3RD 4TH MIN = 0.00 MAX = 0.16 p-p = 0.16 5TH 6TH
0.6 300k 1M 10M 100M FREQUENCY Hz 1G
Figure 2. Typical Composite Output Differential Gain & Phase, NTSC for Y Channel; f = 3.58 MHz, RL = 150
Figure 4. Gain Flatness to 0.1 dB
REV. A
3
PHASE Degrees
MIN = 0.00 MAX = 0.20 p-p/MAX = 0.20
2
180
AD835
X, Y CH = 5dBm RL = 150 CL < 5pF 10
0
MAGNITUDE dB
30 40 X FEEDTHROUGH 50 60 Y FEEDTHROUGH
Y FEEDTHROUGH
40 60
X FEEDTHROUGH
80
1M
10M 100M FREQUENCY Hz
1G
1M
10M 100M FREQUENCY Hz
1G
Figure 5. X and Y Feedthrough vs. Frequency
Figure 8. CMRR vs. Frequency for X or Y Channel, RL = 150 , CL 5 pF
0dBm ON SUPPLY X, Y = 1V 10 PSRR ON V+
PSRR dB
0.200V
20 30 40 50 PSRR ON V
GND
0.200V
60
100 mV
10ns
300k 1M 10M 100M FREQUENCY Hz 1G
Figure 6. Small Signal Pulse Response at W Output, RL = 150 , CL 5 pF, X Channel = ±0.2 V, Y Channel = ±1.0 V
Figure 9. PSRR vs. Frequency for V+ and V Supply
10MHz
1V
GND
10dB/DIV
1V
30MHz 20MHz
500 mV
10ns
Figure 7. Large Signal Pulse Response at W Output, RL = 150 , CL 5 pF, X Channel = ±1.0 V, Y Channel = ±1.0 V
Figure 10. Harmonic Distortion at 10 MHz; 10 dBm Input to X or Y Channels, RL = 150 , CL = 5 pF
4
REV. A
CMRR dB
20
20
AD835
15 OUTPUT OFFSET DRIFT WILL TYPICALLY BE WITHIN SHADED AREA
50MHz
10
VOS OUTPUT DRIFT mV
5
10dB/DIV 100MHz 150MHz
0
5
10 OUTPUT VOS DRIFT, NORMALIZED TO 0 AT 25°C 15 55 35 15 5 25 45 65 85 105 125
TEMPERATURE °C
Figure 11. Harmonic Distortion at 50 MHz, 10 dBm Input to X or Y Channel, RL = 150 , CL 5 pF
Figure 14. VOS Output Drift vs. Temperature
35 30
3RD ORDER INTERCEPT dBm
100MHz
X CH = 6dBm Y CH = 10dBm RL = 100
25 20
200MHz 10dB/DIV
300MHz
15 10 5 0 0 20 40 60 80 100 120 140 160 RF FREQUENCY INPUT X CHANNEL MHz 180 200
Figure 12. Harmonic Distortion at 100 MHz, 10 dBm Input to X or Y Channel, RL = 150 , CL 5 pF
Figure 15. Fixed LO on Y Channel vs. RF Frequency Input to X Channel
35 30
+2.5V
3RD ORDER INTERCEPT dBm
X CH = 6dBm Y CH = 10dBm RL = 100
25 20 15 10
GND
2.5V
5
1V
10ns
0 0 20 40 60 80 100 120 140 160 LO FREQUENCY ON Y CH MHz 180 200
Figure 13. Maximum Output Voltage Swing, RL = 50 , CL 5 pF
Figure 16. Fixed IF vs. LO Frequency on Y Channel
REV. A
5
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