|Category||Data Conversion => ADC (Analog to Digital Converters) => <10 bit|
|Description||High Speed 8-Bit TTL A/D Converter|
|Datasheet||Download AD9012TE datasheet
FEATURES 100 MSPS Encode Rate Very Low Input Capacitance--16 pF Low Power--1 W TTL Compatible Outputs MIL-STD-883 Compliant Versions Available APPLICATIONS Radar Guidance Digital Oscilloscopes/ATE Equipment Laser/Radar Warning Receivers Digital Radio Electronic Warfare (ECM, ECCM, ESM) Communication/Signal Intelligence
The an 8-bit, ultrahigh speed, analog-to-digital converter. The AD9012 is fabricated in an advanced bipolar process that allows operation at sampling rates up to one hundred megasamples/second. Functionally, the AD9012 is comprised of 256 parallel comparator stages whose outputs are decoded to drive the TTL compatible output latches. The exceptionally wide large-signal analog input bandwidth of 160 MHz is due to an innovative comparator design and very close attention to device layout considerations. The wide input bandwidth of the AD9012 allows very accurate acquisition of high speed pulse inputs without an external track-and-hold. The comparator output decoding scheme minimizes false codes, which is critical to high speed linearity. The AD9012 is available in two grades: one with 0.5 LSB linearity and one with 0.75 LSB linearity. Both versions are
offered in an industrial grade, to +85°C, packaged a 28-lead DIP and a 28-lead JLCC. The military temperature range devices, to +125°C, are available in ceramic DIP and LCC packages and are compliant to MIL-STD-883 Class B. The AD9012 is available in versions compliant with MIL-STD883. Refer to the Analog Devices Military Products Databook or current AD9012/883B data sheet for detailed specifications.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001
Parameter RESOLUTION DC ACCURACY Differential Linearity Integral Linearity No Missing Codes INITIAL OFFSET ERROR Top of Reference Ladder Bottom of Reference Ladder Offset Drift Coefficient ANALOG INPUT Input Bias Current1 Input Resistance Input Capacitance Large Signal Bandwidth2 Analog Input Slew Rate3 REFERENCE INPUT Reference Ladder Resistance Ladder Temperature Coefficient Reference Input Bandwidth DYNAMIC PERFORMANCE Conversion Rate Aperture Delay Aperture Uncertainty (Jitter) Output Delay (tPD)4, 5 Transient Response6 Overvoltage Recovery Time7 Output Rise Time4 Output Fall Time4 Output Time Skew4, 8 ENCODE INPUT Logic "1" Voltage4 Logic "0" Voltage4 Logic "1" Current Logic "0" Current Input Capacitance Encode Pulsewidth (Low)9 Encode Pulsewidth (High)9 OVERFLOW INHIBIT INPUT 0 V Input Current AC LINEARITY10 Effective Bits11 In-Band Harmonics to 1.23 MHz to 9.3 MHz to 19.3 MHz Signal-to-Noise Ratio12 Noise Power Ratio13 DIGITAL OUTPUT Logic "1" Voltage Logic "0" Voltage 25°C Full 25°C Full 25°C Full 25°C Full 25°C Full 25°C Full 25°C Full 25°C Full VI I III 48 46 Temp GUARANTEED(+VS +5.0 V; VS 5.2 V; Differential Reference Voltage 2.0 V; unless otherwise noted.)
POWER SUPPLY14 Positive Supply Current V) 25°C Full Supply Current V) 25°C Full Nominal Power Dissipation 25°C Reference Ladder Dissipation 25°C 15 Power Supply Rejection Ratio 25°C
NOTES 1 Measured with Analog Input V. 2 Measured by FFT analysis where fundamental is 3 dBc. 3 Input slew rate derived from rise time 90%) of full-scale step input. 4 Outputs terminated with two equivalent 'LS00 type loads. (See load circuit.) 5 Measured from ENCODE into data out for LSB only. 6 For full-scale step input, 8-bit accuracy is attained in specified time. 7 Recovers to 8-bit accuracy in specified time, after 150% full-scale input overvoltage. 8 Output time skew includes high-to-low and low-to-high transitions as well a s bit-to-bit time skew differences.
ENCODE signal rise/fall times should be less than 30 ns for normal operation. Measured at 75 MSPS encode rate. Harmonic data based on worst case harmonics. 11 Analog input frequency = 1.23 MHz. 12 RMS signal to rms noise, including harmonics with 1.23 MHz. analog input signal. 13 NPR measured @ 0.5 MHz. Noise Source 250 mW (rms) from 0.5 MHz to 8 MHz. 14 Supplies should remain stable within ± 5% for normal operation. 15 Measured ± 5% and ± 5%. Specifications subject to change without notice.
Positive Supply Voltage (+VS). 6 V Analog to Digital Supply Voltage Differential (VS). 0.5 V Negative Supply Voltage (VS). 6 V Analog Input Voltage. VS +0.5 V ENCODE Input Voltage. +5 V OVERFLOW INH Input Voltage. 0 V Reference Input Voltage (+VREF +0.1 V Differential Reference Voltage. 2.1 V Reference Midpoint Current. 4 mA Digital Output Current. 30 mA Operating Temperature Range to +125°C Storage Temperature Range. to +150°C Junction Temperature3. 150°C Lead Soldering Temperature (10 sec). 300°C
NOTES 1 Absolute maximum ratings are limiting values, to be applied individually, and beyond which the serviceability of the circuit may be impaired. Functional operability under any of these conditions is not necessarily implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 +VREF VREF under all circumstances. 3 Maximum junction temperature (t J max) should not exceed 150 °C for ceramic and plastic packages: = PD (JA) tA PD (JC) + tc where PD = power dissipation JA = thermal impedance from junction to ambient ( °C/W) JC = thermal impedance from junction to case ( °C/W) tA = ambient temperature ( °C) tC = case temperature ( °C) typical thermal impedances are: Ceramic DIP = 42 °C/W; = 10°C/W Ceramic LCC = 15°C/W JLCC = 15°C/W.
100% production tested at 25°C, and sample tested at specified temperatures. AC testing done on sample basis. III Sample tested only. IV Parameter is guaranteed by design and characterization testing. V Parameter is a typical value only. VI All devices are 100% production tested 25°C. 100% production tested at temperature extremes for extended temperature devices; guaranteed by design and characterization testing for industrial devices.*E = Leadless Ceramic Chip Carrier; J = Ceramic Leaded Chip Carrier; Q = Cerdip.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9012 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
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