Details, datasheet, quote on part number: AD9042D
CategoryMultimedia => Video => A/D Converters
Description12-bit, 41 MSPS Monolithic A/D Converter
CompanyAnalog Devices
DatasheetDownload AD9042D datasheet
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Features, Applications

FEATURES 41 MSPS Minimum Sample Rate 80 dB Spurious-Free Dynamic Range 595 mW Power Dissipation Single +5 V Supply On-Chip T/H and Reference Twos Complement Output Format CMOS-Compatible Output Levels APPLICATIONS Cellular/PCS Base Stations GPS Anti-Jamming Receivers Communications Receivers Spectrum Analyzers Electro-Optics Medical Imaging ATE PRODUCT DESCRIPTION

The is a high speed, high performance, low power, monolithic 12-bit analog-to-digital converter. All necessary functions, including track-and-hold (T/H) and reference are included on chip to provide a complete conversion solution. The AD9042 runs off of a single +5 V supply and provides CMOS-compatible digital outputs at 41 MSPS. Designed specifically to address the needs of wideband, multichannel receivers, the AD9042 maintains 80 dB spurious-free dynamic range (SFDR) over a bandwidth of 20 MHz. Noise performance is also exceptional; typical signal-to-noise ratio is 68 dB. The AD9042 is built on Analog Devices' high speed complementary bipolar process (XFCB) and uses an innovative multipass architecture. Units are packaged a 28-pin DIP; this custom

cofired ceramic package forms a multilayer substrate to which internal bypass capacitors and the 9042 die are attached and a 44-pin TQFP low profile surface mount package. The AD9042 industrial grade is specified from to +85C. However, the AD9042 was designed to perform over the full military temperature range to +125C); consult factory for military grade product options.

1. Guaranteed sample rate is 41 MSPS. 2. Dynamic performance specified over entire Nyquist band; spurious signals typ. 80 dBc for 1 dBFS input signals. 3. Low power dissipation: 595 mW off a single +5 V supply. 4. Reference and track-and-hold included on chip. 5. Packaged in 28-pin ceramic DIP and 44-pin TQFP.

TOP VIEW 23 D6 GND 7 (Not to Scale) 22 D5 AIN 8 VOFFSET 9 VREF 10 GND 11 AVCC 12 GND 13 AVCC 17 D0 (LSB)

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Analog Devices, Inc., 1996 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703

Parameter RESOLUTION DC ACCURACY No Missing Codes Offset Error Offset Tempco Gain Error Gain Tempco REFERENCE OUT (VREF)2 ANALOG INPUT (AIN) Input Voltage Range Input Resistance Input Capacitance ENCODE INPUT3 Logic Compatibility4 Logic "1" Voltage Logic "0" Voltage Logic "1" Current (VINH 5 V) Logic "0" Current (VINL 0 V) Input Capacitance DIGITAL OUTPUTS Logic Compatibility Logic "1" Voltage (IOH = 10 A) Logic "0" Voltage (IOL = 10 A) Output Coding POWER SUPPLY AVCC Supply Voltage I (AVCC) Current DVCC Supply Voltage I (DVCC) Current ICC (Total) Supply Current Power Dissipation Power Supply Rejection (PSRR) Full +25C Full I V Full VI V

= DVCC +5 V; VREF tied to VOFFSET through 50 ; TMIN = 40C, TMAX = +85C)1

NOTES 1 C1 (Pin on AD9042AST only) tied to GND through 0.01 F capacitor. 2 VREF is normally tied to V OFFSET through 50. If VREF is used to provide dc offset to other circuits, it should first be buffered. 3 ENCODE driven by single-ended source; ENCODE bypassed to ground through 0.01 F capacitor. 4 ENCODE may also be driven differentially in conjunction with ENCODE; see "Encoding the AD9042" for details. Specifications subject to change without notice.

Parameter (Conditions) Maximum Conversion Rate Minimum Conversion Rate Aperture Delay (tA) Aperture Uncertainty (Jitter) ENCODE Pulse Width High ENCODE Pulse Width Low Output Delay (tOD) Temp Full +25C Full

(AVCC = DVCC +5 V; ENCODE & ENCODE = 41 MSPS; VREF tied to VOFFSET through 50 ; TMIN = 40C, TMAX = +85C)1

Test Level IV AD9042AST Min Typ Max Test Level IV AD9042AD Min Typ Max Units MSPS ps rms ns
NOTE 1 C1 (Pin on AD9042AST only) tied to GND through 0.01 F capacitor.

Parameter (Conditions) SNR3 Analog Input @ 1 dBFS 1.2 MHz 9.6 MHz 19.5 MHz SINAD4 Analog Input @ 1 dBFS

(AVCC = DVCC +5 V; ENCODE & ENCODE = 41 MSPS; VREF tied to VOFFSET through 50 ; TMIN = 40C, TMAX = +85C)2

Temp +25C Full +25C Full +25C Full +25C Full +25C Full +25C Full +25C Full +25C Full +25C Full +25C Full +25C Test Level 1.0 AD9042AST Min Typ Max Test Level VI 1.0 Min 64 AD9042AD Typ Max

Small Signal SFDR (w/Dither)6 Analog Input @1.2 MHz 9.6 MHz 19.5 MHz Two-Tone IMD @ 7 dBFS Two-Tone SFDR (w/Dither)8 Thermal Noise Differential Nonlinearity (ENCODE = 20 MSPS) Integral Nonlinearity (ENCODE = 20 MSPS) Analog Input Bandwidth Transient Response Overvoltage Recovery Time

NOTES 1 All ac specifications tested by driving ENCODE and ENCODE differentially; see "ENCODING the AD9042" for details. 2 C1 (Pin on AD9042AST only) tied to GND through 0.01 F capacitor. 3 Analog input signal power at 1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). 4 Analog input signal power at 1 dBFS; signal-to-noise and distortion (SINAD ) is the ratio of signal level to total noise + harmonics. 5 Analog input signal power at 1 dBFS; worst spur is the ratio of the signal level to worst spur, usually limited by harmonics. 6 Analog input signal power swept from 20 dBFS to 95 dBFS; dither power = 32.5 dBm; dither circuit used on input signal (see "Overcoming Static Nonlinearities with Dither"); SFDR is ratio of converter full scale to worst spur. 7 Tones at 7 dBFS = 15.3 MHz, = 19.5 MHz); two tone intermodulation distortion (IMD) rejection is ratio of either tone to worst third order intermod product. 8 Both input tones swept from to 95 dBFS; Dither power = 32.5 dBm; dither circuit used on input signal (see "Overcoming Static Nonlinearities with Dither); two tone spurious-free dynamic range (SFDR) is the ratio of converter full scale to worst spur. Specifications subject to change without notice.


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