Details, datasheet, quote on part number: AD9058JD
PartAD9058JD
CategoryMultimedia => Video => A/D Converters
DescriptionDual 8-bit 50 MSPS A/D Converter
CompanyAnalog Devices
DatasheetDownload AD9058JD datasheet
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Features, Applications

FEATURES Two Matched ADCs on Single Chip 50 MSPS Conversion Speed On-Board Voltage Reference Low Power (<1W) Low Input Capacitance (10 pF) 65 V Power Supplies Flexible Input Range APPLICATIONS Quadrature Demodulation for Communications Digital Oscilloscopes Electronic Warfare Radar

The AD9058 combines two independent high performance 8-bit analog-to-digital converters (ADCs) on a single monolithic IC. Combined with an optional onboard voltage reference, the AD9058 provides a cost effective alternative for systems requiring two or more ADCs. Dynamic performance (SNR, ENOB) is optimized to provide to 50 MSPS conversion rates. The unique architecture results in low input capacitance while maintaining high performance and low power (<0.5 watt/channel). Digital inputs and outputs are TTL compatible. Performance has been optimized for an analog input 2 V p-p to +2 V). Using the onboard +2 V voltage reference, the AD9058 can be set up for unipolar positive operation to +2 V). This internal voltage reference can drive both ADCs. Commercial to +70C) and military to +125C) temperature range parts are available. Parts are supplied in hermetic 48-lead DIP and 44-lead "J" lead packages.

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 Analog Devices, Inc., 2000

Analog Input. +2.5 V +VS. +6 V VS. 6 V2 Digital Inputs. V to +VS Digital Output Current. 20 mA Voltage Reference Current.53 mA +VREF. +2.5 V

VREF. 1.5 Operating Temperature Range to +70C Maximum Junction AD9058JD/JJ/KD/KJ. +175C Storage Temperature Range. to +150C Lead Temperature (Soldering, 10 sec). +300C

Parameter (Conditions) RESOLUTION DC ACCURACY Differential Nonlinearity Integral Nonlinearity No Missing Codes ANALOG INPUT Input Bias Current Input Resistance Input Capacitance Analog Bandwidth REFERENCE INPUT Reference Ladder Resistance Ladder Tempco Reference Ladder Offset (Top) Reference Ladder Offset (Bottom) Offset Drift Coefficient INTERNAL VOLTAGE REFERENCE Reference Voltage Temperature Coefficient Power Supply Rejection Ratio (PSRR) SWITCHING PERFORMANCE Maximum Conversion Rate4 Aperture Delay (tA) Aperture Delay Matching Aperture Uncertainty (Jitter) Output Delay (Valid) (tV)4 Output Delay (tV) Tempco Propagation Delay (tPD)4 Propagation Delay (tPD) Tempco Output Time Skew ENCODE INPUT Logic "1" Voltage Logic "0" Voltage Logic "1" Current Logic "0" Current Input Capacitance Pulsewidth (High) Pulsewidth (Low)

[VS 5 V; VREF +2 V (internal); ENCODE = 40 MSPS; AIN +2 V; VREF = GROUND, unless otherwise noted.]2 All specifications apply to either of the two ADCs

+25C Full +25C Full +25C Full +25C Full +25C Full +25C Full +25C Full +25C Full +25C Full +25C Full +25C

k pF MHz C mV V/C V V/C mV/V MSPS ns ps, rms ns ps/C ns ps/C pF ns REV. B

Parameter (Conditions) DYNAMIC PERFORMANCE Transient Response Overvoltage Recovery Time Effective Number of Bits (ENOB)5 Analog Input @ 2.3 MHz @ 10.3 MHz Signal-to-Noise Ratio5 Analog Input @ 2.3 MHz @ 10.3 MHz Signal-to-Noise Ratio5 (Without Harmonics) Analog Input @ 2.3 MHz @ 10.3 MHz 2nd Harmonic Distortion Analog Input @ 2.3 MHz @ 10.3 MHz 3rd Harmonic Distortion Analog Input @ 2.3 MHz @ 10.3 MHz Crosstalk Rejection6 DIGITAL OUTPUTS Logic "1" Voltage (IOH = 2 mA) Logic "0" Voltage (IOL = 2 mA) POWER SUPPLY7 +VS Supply Current VS Supply Current Power Dissipation Temp +25C Full Test Level IV VI Min AD9058JD/JJ Typ Max AD9058KD/KJ Min Typ Max Unit ns Bits dB dBc mA mW

NOTES 1 Absolute maximum ratings are limiting values to be applied individually, and beyond which the serviceability of the circuit may be impaired. Functional operability is not necessarily implied. Exposure to absolute maximum rating conditions for an extended period of time may affect device reliability. 2 For applications in which +V S may be applied before +V S current is not limited to 500 mA, a reverse biased clamping diode should be inserted between ground and VS to prevent destructive latch up. See section entitled "Using the AD9058." 3 Typical thermal impedances: 44-lead hermetic J-Leaded ceramic package: = 86.4 C/W; 24.9 C/W; 48-lead hermetic DIP = 40 C/W; 4 To achieve guaranteed conversion rate, connect each data output to ground through 2 k pull-down resistor. 5 SNR performance limits for the 48-lead DIP "D" package are 1 dB less than shown. ENOB limits are degraded by 0.3 dB. SNR and ENOB measured with analog input signal 1 dB below full scale at specified frequency. 6 Crosstalk rejection measured with full-scale signals of different frequencies (2.3 MHz and 3.5 MHz) applied to each channel. With both signals synchronously encoded at 40 MSPS, isolation of the undesired frequency is measured with an FFT. 7 Applies to both A/Ss and includes internal ladder dissipation. Specifications subject to change without notice.

Test Level 100% production tested. 100% production tested at +25C, and sample tested at specified temperatures. III Sample tested only. IV Parameter is guaranteed by design and characterization testing. V Parameter is a typical value only. VI All devices are 100% production tested +25C. 100% production tested at temperature extremes for extended temperature devices; sample tested at temperature extremes for commercial/industrial devices.

Description

44-Lead J-Leaded +70C 44-Lead J-Leaded Ceramic, AC Tested +125C 44-Lead J-Leaded Ceramic, AC Tested +70C 48-Lead Ceramic DIP +70C 48-Lead Ceramic DIP, AC Tested +125C 48-Lead Ceramic DIP, AC Tested

NOTES D = Hermetic Ceramic DIP Package; J = Leaded Ceramic Package. 2 Hermetically sealed ceramic package; footprint equivalent to PLCC. 3 For specifications, refer to Analog Devices Military Products Databook.


 

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