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Details, datasheet, quote on part number:AD9661A
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Datasheet text preview:
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FEATURES < 2 ns Rise/Fall Times Output Current: 120 mA Single +5 V Power Supply Switching Rate: 200 MHz typ Onboard Light Power Control Loop APPLICATIONS Laser Printers and Copiers GENERAL DESCRIPTION
Laser Diode Driver with Light Power Control AD9661A
and fall times are 2 ns to complement printer applications that use image enhancing techniques such as pulse width modulation to achieve gray scale and resolution enhancement. Control signals are TTL/CMOS compatible. The driver output provides up to 120 mA of current into an infrared N type laser, and the onboard disable circuit turns off the output driver and returns the light power control loop to a safe state. The AD9661A can also be used in closed-loop applications in which the output power level follows an analog POWER LEVEL voltage input. By optimizing the external hold capacitor and the photo detector, the loop can achieve bandwidths as high as 25 MHz. The AD9661A is offered in a 28-pin plastic SOIC for operation over the commercial temperature range (0°C to + 7 0 °C ) .
The AD9661A is a highly integrated driver for laser diode applications such as printers and copiers. The AD9661A gets feedback from an external photo detector and includes an analog feedback loop to allow users to set the power level of the laser, and switch the laser on and off at up to 100 MHz. Output rise
FUNCTIONAL BLOCK DIAGRAM
DISABLE PULSE PULSE2 CAL
TTL TTL
DISABLE CIRCUIT
*13ns DELAY ON RISING EDGE; 0ns ON FALLING HOLD
TTL TTL DELAY
*
VOLT REF
VREF
+5V
PHOTO DETECTOR
POWER LEVEL LEVEL SHIFT OUT LEVEL SHIFT IN DAC GAIN CGAIN RGAIN
ANALOG VLEVEL SHIFT IN + VREF 5pF LEVEL SHIFT CIRCUIT 01.6V 50
V1 1:10 REF
3120mA IOUT
LASER DIODE
OUTPUT
8
AD9661A
ANALOG POWER MONITOR VREF
IMONITOR
1:1
SENSE IN IMONITOR 1.0V
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. © Analog Devices, Inc., 1995 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
AD9661ASPECIFICATIONS (+V = +5 V, Temperature = +25 C unless otherwise noted)
S
Parameter ANALOG INPUT Input Voltage Range, POWER LEVEL Input Bias Current, POWER LEVEL Analog Bandwidth, Control Loop1 Input Voltage Range, LEVEL SHIFT IN Input Bias Current, LEVEL SHIFT IN Analog Bandwidth, Level Shift2 Level Shift Offset Level Shift Gain OUTPUTS Output Current, IOUT Output Compliance Range Idle Current Disable Current SWITCHING PERFORMANCE Maximum Pulse Rate Output Propagation Delay (tPD), Rising3 Output Propagation Delay (tPD), Falling3 Output Current Rise Time4 Output Current Fall Time5 CAL Aperture Delay6 Disable Time7 HOLD NODE Input Bias Current Input Voltage Range Minimum External Hold Cap TTL /CMOS INPUTS Logic "1" Voltage Logic "1" Voltage Logic "0" Voltage Logic "0" Voltage Logic "1" Current Logic "0" Current
8
Test Level Temp
Min
AD9661AKR Typ Max
Units
Conditions
IV I V IV I V I I I IV I IV V IV IV IV IV IV IV I IV V I IV I IV I I I V V I I V I I
Full +25° C + 2 5° C Full +25 ° C Full +25 ° C +25 ° C + 2 5° C +25 ° C +25° C +25°C +25 ° C Full Full Full Full Full +25° C +25° C Full Full +25° C Full +25° C Full +25° C +25 ° C + 2 5° C +25° C +25 ° C +25° C +25° C +25° C + 2 5° C + 2 5° C
V REF 50 25 0.1 10 130 32 0.95 120 2.50 2 1.0
VREF + 1.6 +50 1.6 0 +32 1.05
V µA MHz V µA MHz mV V/V mA V mA µA MHz ns ns ns ns ns ns nA V pF V V V V µA mA V mV/° C mA mA/mA V V mA
CHOLD = 33 pF, RF = 1 k, CF = 2 pF
VOUT = 2.5 V PULSE = LOW, DISABLE = LOW PULSE = LOW, DISABLE = HIGH Output Current 3 dB
5.25 5.0 1.0
2.9 3.2
200 3.9 3.7 1.5 1.5 13 3
5.0 4.3 2.0 2.0 5 200 VREF + 1.6
200 VREF 25 2.0 2.0
VHOLD = 2.5 V Open-Loop Application Only
10 1.5 1.6 0.5 0.95 0.7 1 1.0 <150 5.00 75 1.8 0.1
0.8 0.8 10
VHIGH = 5.0 V VLOW = 0.8 V
BANDGAP REFERENCE Output Voltage (VREF) Temperature Coefficient Output Current SENSE IN Current Gain Voltage Input Resistance POWER SUPPLY +VS Voltage +VS Current
1.9 1.0 1.02 1.3
4.75 60
5.25 95
DISABLE = HIGH, VHOLD = VREF, VS = 5.0 V
NOTES 1 Based on rise time of closed-loop pulse response. See Performance Curves. 2 Based on rise time of pulse response. 3 Propagation delay measured from the 50% of the rising/falling transition of WRITE PULSE to the 50% point of the rising/falling edge of the output modulation current. 4 Rise time measured between the 10% and 90% points of the rising transition of the modulation current. 5 Fall time measured between the 10% and 90% points of the falling transition of the modulation current. 6 Aperture Delay is measured from the 50% point of the rising edge of WRITE PULSE to the time when the output modulation begins to recalibrate, WRITE CAL is held during this test. 7 Disable Time is measured from the 50% point of the rising edge of DISABLE to the 50% point of the falling transition of the output current. Fall time during disable is similar to fall time during normal operation. 8 PULSE, PULSE2, DISABLE, and CAL are TTL/CMOS compatible inputs. Specifications subject to change without notice.
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AD9661A
ABSOLUTE MAXIMUM RATINGS*
+VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6 V POWER LEVEL, LEVEL SHIFT IN . . . . . . . . . . . 0 V to +VS TTL/CMOS INPUTS . . . . . . . . . . . . . . . . . . . . 0.5 V to +VS Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA Operating Temperature AD9661AKR . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C Storage Temperature . . . . . . . . . . . . . . . . . . 65°C to +150°C Maximum Junction Temperature . . . . . . . . . . . . . . . . . +150°C Lead Soldering Temp (10 sec) . . . . . . . . . . . . . . . . . . . +300°C
*Absolute maximum ratings are limiting values, to be applied individually, and beyond which the serviceability of the circuit may be impaired. Functional operability under any of these conditions is not necessarily implied. Exposure of absolute maximum rating conditions for extended periods of time may affect device reliability.
EXPLANATION OF TEST LEVELS Test Level
I 100% production tested. II 100% production tested at +25°C, and sample tested at specified temperatures. III Sample tested only. IV Parameter is guaranteed by design and characterization testing. V Parameter is a typical value only. VI All devices are 100% production tested at +25°C; 100% production tested at temperature extremes for military devices; sample tested at temperature extremes for commercial/industrial devices.
ORDERING GUIDE
Model
Temperature Range Package Option R-28 R-28 (1000/Reel)
+VS 1mA 1mA +VS
AD9661AKR 0°C to +70°C AD9661AKR-REEL 0°C to +70°C
+VS
VBANDGAP TTL INPUT
100 VREF 450
SENSE IN
50
50
1250
OUTPUT
HOLD
T/H
Equivalent Circuits
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9661A features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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AD9661A
PIN DESCRIPTIONS
Pin OUTPUT POWER LEVEL
Function Analog laser diode current output. Connect to cathode of laser diode, anode connected to +VS externally. Analog voltage input, VREF to VREF + 1.6 V. Output current is set proportional to the POWER LEVEL V POWER LEVEL VREF during calibration as follows: I MONITOR = RGAIN + 50 TTL/CMOS compatible, feedback loop T/H control signal. Logic LOW enables calibration mode, and the feedback loop T/H goes into track mode 13 ns after (the aperture delay) PULSE goes logic HIGH (there is no aperture delay if PULSE goes high before CAL transitions to a LOW level). Logic HIGH disables the T/H and immediately places it in hold mode. PULSE should be held HIGH while calibrating. Floats logic HIGH. External hold capacitor for the bias loop T/H. Approximate droop in the output current while CAL is 9 18 × 10 t HOLD ±IOUT = logic HIGH is: CHOLD Bandwidth of the loop is: BW 2 ( 550 ) C HOLD
CAL
HOLD
1
PULSE PULSE 2 SENSE IN
GAIN
POWER MONITOR DISABLE
V REF + VS GROUND LEVEL SHIFT IN LEVEL SHIFT OUT
TTL /CMOS compatible, current control signal. Logic HIGH supplies I OUT to the laser diode. Logic LOW turns I OUT off. Floats logic HIGH. TTL /CMOS compatible, current control signal. Logic LOW supplies IOUT to the laser diode. Logic HIGH turns I OUT off. Floats logic HIGH. Analog current input, IMONITOR, from PIN photo detector diode. SENSE IN should be connected to the anode of the PIN diode, with the PIN cathode connected to +VS or another positive voltage. Voltage at SENSE IN varies slightly with temperature and current, but is typically 1.0 V. External connection for the feedback network of the transimpedance amplifier. External feedback network, RGAIN and CGAIN, should be connected between GAIN and POWER MONITOR. See text for choosing values. Output voltage monitor of the internal feedback loop. Voltage is proportional to feedback current from photo diode, IMONITOR. TTL/CMOS compatible, current output disable circuit. Logic LOW for normal operation; logic HIGH disables the current outputs to the laser diode, and drives the voltage on the hold capacitors close to VREF (minimizes the output current when the device is re-enabled). DISABLE floats logic HIGH. Analog Voltage output, internal bandgap voltage reference, ~1.8 V, provided to user for power level offset. Power Supply, nominally +5 V. All +VS connections should be tied together externally. Ground reference. All GROUND connections should be tied together externally. Analog input to the on board level shift circuit. Input Range 0.1 V 1.6 V. Voltage output from on board level shift circuit. Connect to POWER LEVEL externally to use the on board level shift circuit. Output voltage is VLEVEL SHIFT OUT = VLEVEL SHIFT IN +VREF.
PIN ASSIGNMENTS
PULSE2 DNC VREF 1 2 3 28 +VS 27 GROUND 26 OUTPUT 25 GROUND 24 OUTPUT
LEVEL SHIFT IN 4 GAIN 5 POWER MONITOR SENSE INPUT GROUND +VS 6 7 8 9
AD9661AKR
(Not to Scale)
23 GROUND 22 OUTPUT 21 GROUND 20 OUTPUT 19 GROUND 18 +VS 17 GROUND 16 CAL 15 PULSE1
GROUND 10 HOLD 11 POWER LEVEL 12 LEVEL SHIFT OUT 13 DISABLE 14
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AD9661A
THEORY OF OPERATION Control Loop Transfer Function
The AD9661A combines a very fast output current switch with an onboard analog light power control loop to provide the user with a complete laser diode driver solution. The block diagram illustrates the key internal functions. The control loop of the AD9661A adjusts the output current level, IOUT, so that the photo diode feedback current, IMONITOR, into SENSE IN is proportional to the analog input voltage at POWER LEVEL. Since the monitor current is proportional to the laser diode light power, the loop effectively controls laser power to a level proportional to the analog input. The control loop should be periodically calibrated (see Choosing CHOLD). The disable circuit turns off IOUT and returns the hold capacitor voltages to their minimum levels (minimum output current) when DISABLE = logic HIGH. It is used during initial power up of the AD9661A or during time periods where the laser is inactive. When the AD9661A is re-enabled the control loop must be recalibrated. Normal operation of the AD9661A involves the following (in order, see Figure 1): 1. The AD9661A is enabled (DISABLE = logic LOW). 2. The input voltage (POWER LEVEL) is driven to the appropriate level to set the calibrated laser diode output power level. 3. The feedback loop is closed for calibration (CAL = logic LOW, and PULSE = logic HIGH), and then opened (CAL = logic HIGH). 4. While the feedback loop is open, the laser is pulsed on and off by PULSE. 5. The feedback loop is periodically recalibrated as needed. 6. The AD9661A is disabled when the laser will not be pulsed for an indefinite period of time.
The relationship between IMONITOR and VPOWER LEVEL is
I MONITOR = VPOWER LEVEL V REF ( RGAIN + 50 )
once the loop is calibrated. When the loop is open (CAL = logic HIGH), the output current, IOUT, is proportional to the held voltage at HOLD; the external hold capacitor on this pin determines the droop error in the output current between calibrations. The sections below discuss choosing the external components in the feedback loop for a particular application.
C h o o s i n g R GAIN
The gain resistor, RGAIN, allows the user to match the feedback loop's transfer function to the laser diode/photo diode combination. The user should define the maximum laser diode output power for the intended application, PLD MAX, and the corresponding photo diode monitor current, IMONITOR MAX. A typical laser diode transfer function is illustrated below. RGAIN should be chosen as: 1.6 V RGAIN = 50 I MONITOR MAX
4 0°C CASE
OPTICAL OUTPUT mW
3
CONSTANT WRITE POWER 2
25°C CASE 50°C CASE
1
0
0
20
40 60 80 FORWARD CURRENT mA IOUT
100
120
Figure 2. Laser Diode Current-to-Optical Power Curve
DISABLE
POWER-UP OR LASER NOT IN USE CAL TIME RECALIBRATE HOLD TIME
CAL
PULSE LASER POWER MODULATED CALIBRATED LEVEL LASER OUTPUT POWER
Figure 1. Normal Operating Mode
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