|Category||Power Management => Regulators => Switching Regulators|
|Description||5-Bit Programmable 2-Phase Synchronous Buck Controller|
|Datasheet||Download ADP3160J datasheet
FEATURES ADOPTTM Optimal Positioning Technology for Superior Load Transient Response and Fewest Output Capacitors Complies with VRM 9.0 with Lowest System Cost Active Current Balancing Between Both Output Phases 5-Bit Digitally Programmable 1.85 V Output Dual Logic-Level PWM Outputs for Interface to External High-Power Drivers Total Output Accuracy 0.8% Over Temperature Current-Mode Operation Short Circuit Protection Power-Good Output Overvoltage Protection Crowbar Protects Microprocessors with No Additional External Components APPLICATIONS Desktop PC Power Supplies for: High-Performance Intel Processors AMD Athlon® Processors VRM Modules
VCC UVLO & BIAS SET RESET CROWBAR REF GND DAC+24% PWRGD CT OSCILLATOR CMP CMP2 DAC18% CS CMP CMP1 COMP FB gm CS+ 3.0V REFERENCE 2-PHASE DRIVER LOGIC PWM1
The is a highly efficient, dual output, synchronous buck switching regulator controller optimized for converting 12 V main supply into the core supply voltage required by high-performance processors such as Pentium® IV and Athlon. The ADP3160 uses an internal 5-bit DAC to read a voltage identification (VID) code directly from the processor, which is used to set the output voltage between 1.1 V and 1.85 V. The ADP3160 uses a current mode PWM architecture to drive two logic-level outputs at a programmable switching frequency that can be optimized for VRM size and efficiency. The output signals are 180 degrees out of phase, allowing for the construction of two complementary buck switching stages. These two stages share the dc output current to reduce overall output voltage ripple. An active current balancing function ensures that both phases carry equal portions of the total load current, even under large transient loads, to minimize the size of the inductors.
The ADP3160 also uses a unique supplemental regulation technique called active voltage positioning to enhance load transient performance. Active voltage positioning results in a dc/dc converter that meets the stringent output voltage specifications for high-performance processors, with the minimum number of output capacitors and smallest footprint. Unlike voltage-mode and standard current-mode architectures, active voltage positioning adjusts the output voltage as a function of the load current so that it is always optimally positioned for a system transient. The ADP3160 also provides accurate and reliable short circuit protection and adjustable current limiting. The ADP3160 is specified over the commercial temperature range to 70°C and is available a 16-lead narrow body SOIC package.
ADOPT is a trademark of Analog Devices Inc. Athlon is a registered trademark of Advanced Micro Devices, Inc. Pentium is a registered trademark of Intel Corporation.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001
Parameter FEEDBACK INPUT Accuracy 1.1 V Output 1.475 V Output 1.85 V Output Line Regulation Input Bias Current Crowbar Trip Threshold Crowbar Reset Threshold Crowbar Response Time REFERENCE Output Voltage Output Current VID INPUTS Input Low Voltage Input High Voltage Input Current Pull-Up Resistance Internal Pull-Up Voltage OSCILLATOR Maximum Frequency2 Frequency Variation CT Charge Current ERROR AMPLIFIER Output Resistance Transconductance Output Current Maximum Output Voltage Output Disable Threshold 3 dB Bandwidth CURRENT SENSE Current Limit Threshold Voltage Symbol VFB ConditionsVFB IFB VCROWBAR tCROWBAR VREF IREF VIL(VID) VIH(VID) IVID RVID
Figure 1 Figure 1 Figure 1 VCC 14 V Percent of Nominal Output Percent of Nominal Output Overvoltage to PWM Going LowRO(ERR) gm(ERR) IO(ERR) VCOMP(MAX) VCOMP(OFF) BWERR VCS(CL) VCS(FOLD) ni ICS+, ICS tCS
2.0 VFB V FB Forced to VOUT 3% 560 COMP = Open CS+ = VCC FB Forced to VOUT 0.8 V COMP 1 V VCOMP 3 V CS+ = CS = VCC CS+ (CS) mV to PWM Going Low Percent of Nominal Output Percent of Nominal Output IPWRGD(SINK) µA FB Going High FB Going Low IPWM(SINK) 400 µA IPWM(SOURCE) 400 µA Per Phase, Relative to fCT 142
Current Limit Foldback Voltage VCOMP /VCS Input Bias Current Response Time POWER GOOD COMPARATOR Undervoltage Threshold Overvoltage Threshold Output Voltage Low Response Time PWM OUTPUTS Output Voltage Low Output Voltage High Output Current Duty Cycle Limit2
Parameter SUPPLY DC Supply Current Normal Mode UVLO Mode UVLO Threshold Voltage UVLO Hysteresis Symbol Conditions Min Typ Max Unit
NOTES 1 All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. 2 Guaranteed by design, not tested in production. Specifications subject to change without notice.
VCC. +15 V CS+, CS. V to VCC 0.3 V All Other Inputs and Outputs. +10 V Operating Ambient Temperature Range. to 70°C Operating Junction Temperature. 125°C Storage Temperature Range. +150°C JA Two-Layer Board. 125°C/W Four-Layer Board. 81°C/W Lead Temperature (Soldering, 10 sec). 300°C Vapor Phase (60 sec). 215°C Infrared (15 sec). 220°C
*This is a stress rating only; operation beyond these limits can cause the device to be permanently damaged. Unless otherwise specified, all voltages are referenced to GND.
Pin Mnemonic Function VID0 Voltage Identification DAC Inputs. These pins are pulled to an internal reference, providing a Logic 1 if left open. The DAC output programs the FB regulation voltage from 1.85 V. Leaving all five DAC inputs open results in the ADP3160 going into a "No CPU" mode, shutting off its PWM outputs. Error Amplifier Output and Compensation Point. The voltage at this output programs the output current control level between CS+ and CS. Feedback Input. Error amplifier input for remote sensing of the output voltage. External capacitor CT connection to ground sets the frequency of the device. Ground. All internal signals of the ADP3160 are referenced to this ground. Open drain output that signals when the output voltage is in the proper operating range. Current Sense Positive Node. Positive input for the current comparator. The output current is sensed as a voltage at this pin with respect to CS. Logic-level output for the Phase 2 driver. Logic-level output for the Phase 1 driver. Current Sense Negative Node. Negative input for the current comparator. 3.0 V Reference Output. Supply Voltage for the ADP3160.
ORDERING GUIDE Model Temperature Package Range Description Narrow Body SOIC Package Option R-16A (SO-16)
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3160 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
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