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Details, datasheet, quote on part number:OP177G
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Datasheet text preview:
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FEATURES Ultralow Offset Voltage: TA = 25 C: 25 V Max Outstanding Offset Voltage Drift: 0.1 V/ C Max Excellent Open-Loop Gain and Gain Linearity: 12 V/ V Typ CMRR: 130 dB Min PSRR: 115 dB Min Low Supply Current: 2.0 mA Max Fits Industry Standard Precision Op Amp Sockets (OP07/OP77)
Ultraprecision Operational Amplifier OP177
PIN CONNECTIONS Epoxy Mini-DIP (P Suffix) 8-Pin SO (S-Suffix)
VOS TRIM 1 IN 2 +IN 3 V 4
8
VOS TRIM
7 V+ 6 OUT 5 NC
NC = NO CONNECT
GENERAL DESCRIPTION
The OP177 features the highest precision performance of any op amp currently available. Offset voltage of the OP177 is only 25 µV max at room temperature. The ultralow VOS of the OP177 combines with its exceptional offset voltage drift (TCVOS) of 0.1 µV/°C max to eliminate the need for external VOS adjustment and increases system accuracy over temperature. The OP177's open-loop gain of 12 V/µV is maintained over the full ± 10 V output range. CMRR of 130 dB min, PSRR of 120 dB min, and maximum supply current of 2 mA are just a few examples of the excellent performance of this operational amplifier. The OP177's combination of outstanding specifications ensures accurate performance in high closed-loop gain applications.
V+ R2A* R1A 2B (OPTIONA L NULL) R2B*
This low noise bipolar input op amp is also a cost effective alternative to chopper-stabilized amplifiers. The OP177 provides chopper-type performance without the usual problems of high noise, low frequency chopper spikes, large physical size, limited common-mode input voltage range, and bulky external storage capacitors. The OP177 is offered in the 40°C to +85°C extended industrial temperature ranges. This product is available in 8-pin epoxy DIPs, as well as the space saving 8-pin SmallOutline (SO).
C1 R1B
R7 Q19 Q9 Q10 Q11 Q12 Q17 Q16 R9 OUTPUT
Q7 Q5 NONINVERTING INPUT R3 Q1 Q21 INVERTING INPUT R4 Q22 Q23 Q24 Q3 Q6
Q8 Q4 Q27 Q26 Q25 Q2 C3 R5
C2
R10 Q20
Q15 Q14 Q13 R6 Q18 R8
V *NOTE: R2A AND R2B ARE ELECTRONICALLY ADJUSTED ON CHIP AT FACTORY.
Figure 1. Simplified Schematic
REV. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002
ELECTRICAL CHARACTERISTICS
Parameter Symbol Conditions
(@ VS =
15 V, TA = 25 C, unless otherwise noted.)
Min OP177F Typ Max Min OP177G Typ Max
OP177
Unit
INPUT OFFSET VOLTAGE LONG-TERM INPUT OFFSET Voltage Stability INPUT OFFSET1 CURRENT INPUT BIAS CURRENT INPUT NOISE VOLTAGE INPUT NOISE CURRENT INPUT RESISTANCE DifferentialMode3 INPUT RESISTANCE COMMON-MODE INPUT VOLTAGE RANGE4 COMMON-MODE REJECTION RATIO POWER SUPPLY REJECTION RATIO LARGE SIGNAL VOLTAGE GAIN OUTPUT VOLTAGE SWING
VOS
10
25
20
60
µV
VOS/Time IOS IB en in fo = 1 Hz to 100 Hz2 fo = 1 Hz to 100 Hz2 0.2
0.3 0.3 1.2 118 3 1.5 2 150 8 0.2
0.4 0.3 1.2 118 3 2.8 2.8 150 8
µV/Mo nA nA nV rms pA rms
RIN
26
45
18.5
45
M
RINCM IVR ± 13
200 ± 14 ± 13
200 ± 14
G V
CMRR
VCM = ± 13 V
130
140
115
140
dB
PSRR AV O
VS = ± 3 V to ± 18 V RL 2 k, VO = 610 V5 5000
115 12000
125 2000
110 6000
120
dB V/mV
VO
RL RL RL RL
10 k 2 k 1 k 2 k
± 13.5 ± 14.0 ± 12.5 ± 13.0 ± 12.0 ± 12.5 0.1 0.4 0.3 0.6
± 13.5 ± 14.0 ± 12.5 ± 13.0 ± 12.0 ± 12.5 0.1 0.4 0.3 0.6
V V V V/µs MHz
SLEW RATE2 CLOSED-LOOP BANDWIDTH2 OPEN-LOOP OUTPUT RESISTANCE
SR BW
AVCL = 1
RO
60
60
REV. C
2
OP177
POWER CONSUMPTION PD VS = ± 15 V, No Load Vs = ± 3 V, No Load VS = ± 15 V, No Load 50 3.5 60 4.5 50 3.5 60 4.5 mW mW
SUPPLY CURRENT OFFSET ADJUSTMENT RANGE
ISY
1.6
2
1.6
2
mA
RP = 20 k
±3
±3
mV
NOTES 1 Long-Term Input Offset Voltage Stability refers to the averaged trend line of V OS versus time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in V OS during the first 30 operating days are typically less than 2.0 µV. 2 Sample tested. 3 Guaranteed by design. 4 Guaranteed by CMRR test condition. 5 To ensure high open-loop gain throughout the ± 10 V output range, AVO is tested at 10 V VO 0 V, 0 V VO +10 V, and 10 V VO +10 V. Specifications subject to change without notice.
REV. C
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