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Details, datasheet, quote on part number:OP177GP
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Datasheet text preview:
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FEATURES Ultralow Offset Voltage: TA = +25 C: 10 V max 55 C TA +125 C: 20 V max Outstanding Offset Voltage Drift: 0.1 V/ C max Excellent Open-Loop Gain and Gain Linearity: 12 V/ V typ CMRR: 130 dB min PSRR: 120 dB min Low Supply Current: 2.0 mA max Fits Industry Standard Precision Op Amp Sockets (OP07/OP77)
Ultraprecision Operational Amplifier OP177
PIN CONNECTIONS Epoxy Mini-DIP OP177BRC/883 (P Suffix) LCC (RC Suffix) 8-Pin Hermetic DIP (Z-Suffix) 8-Pin SO (S-Suffix)
NC = NO CONNECT
NC = NO CONNECT
GENERAL DESCRIPTION
The OP177 features the highest precision performance of any op amp currently available. Offset voltage of the OP177 is only 10 µV max at room temperature and 20 µV max over the full military temperature range of 55°C to +125°C. The ultralow VOS of the OP177, combines with its exceptional offset voltage drift (TCVOS) of 0.1 µV/°C max, to eliminate the need for external VOS adjustment and increases system accuracy over temperature. The OP177's open-loop gain of 12 V/µV is maintained over the full ± 10 V output range. CMRR of 130 dB min, PSRR of 120 dB min, and maximum supply current of 2 mA are just a few examples of the excellent performance of this operational amplifier. The OP177's combination of outstanding specifications insure accurate performance in high closed-loop gain applications.
This low noise bipolar input op amp is also a cost effective alternative to chopper-stabilized amplifiers. The OP177 provides chopper-type performance without the usual problems of high noise, low frequency chopper spikes, large physical size, limited common-mode input voltage range, and bulky external storage capacitors. The OP177 is offered in both the 55°C to +125°C military, and the 40°C to +85°C extended industrial temperature ranges. This product is available in 8-pin ceramic and epoxy DIPs, as well as the space saving 8-pin Small-Outline (SO) and the Leadless Chip Carrier (LCC) packages.
Figure 1. Simplified Schematic
REV. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. © Analog Devices, Inc., 1995 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
OP177SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ V =
S
15 V, TA = +25 C, unless otherwise noted)
Min OP177A Typ Max 4 0.2 0.3 0.2 118 3 45 200 ± 14 140 125 12000 ± 14.0 ± 13.0 ± 12.5 0.3 0.6 60 50 3.5 1.6 10 1.0 1.5 150 8 Min OP177B Typ 10 0.2 0.3 0.2 Max 25 1.5 2.0 150 8 Units µV µV/Mo nA nA nV rms pA rms M G V dB dB V/mV V V V V/µs MHz mW mW mA
Parameter Input Offset Voltage Long-Term Input Offset Voltage Stability Input Offset Current Input Bias Current Input Noise Voltage Input Noise Current Input Resistance Differential-Mode Input Resistance Common-Mode Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain Output Voltage Swing
Symbol V OS V OS/ T i m e I OS IB en in R IN R INCM IVR CMRR PSRR A VO VO
Conditions (Note 1) fo = 1 Hz to 100 Hz2 fo = 1 Hz to 100 Hz2 (Note 3) (Note 4) VCM = ± 1 3 V VS = ± 3 V to ± 18 V RL 2 k, VO = ± 10 V5 RL 10 k RL 2 k RL 1 k RL 2 k2 AVCL = +12 VS = ± 15 V, No Load VS = ± 3 V, No Load VS = ± 15 V, No Load Rp = 20 k
26 ± 13 130 120 5000 ± 13.5 ± 12.5 ± 12.0 0.1 0.4
Slew Rate Closed-Loop Bandwidth Open-Loop Output Resistance Power Consumption Supply Current Offset Adjustment Range
SR BW RO PD I SY
±3
60 4.5 2.0
118 3 26 45 200 ± 13 ± 14 130 140 115 125 5000 12000 ± 13.5 ± 14.0 ± 12.5 ± 13.0 ± 12.0 ± 12.5 0.1 0.3 0.4 0.6 60 50 60 3.5 4.5 1.6 2.0
±3
mV
NOTES 1 Long-Term Input Offset Voltage Stability refers to the averaged trend line of V OS vs. Time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in V OS during the first 30 operating days are typically less than 2.0 µV. 2 Sample tested. 3 Guaranteed by design. 4 Guaranteed by CMRR test condition. 5 To insure high open-loop gain throughout the ± 10 V output range, A VO is tested at 10 V VO 0 V, 0 V VO +10 V, and 10 V VO +10 V. Specifications subject to change without notice.
ELECTRICAL CHARACTERISTICS (@ V
Parameter Input Offset Voltage Average Input Offset Voltage Drift Input Offset Current Average Input Offset Current Drift Input Bias Current Average Input Bias Current Drift Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large-Signal Voltage Gain Output Voltage Swing Power Consumption Supply Current Symbol VOS TCV OS IOS T C I OS IB TCIB IVR CMRR PSRR AVO VO PD ISY
S
=
15 V, 55°C TA +125 C, unless otherwise noted)
Min OP177A Typ Max 10 0.03 0.5 1.5 2.4 8 ± 13.5 140 125 6000 ± 13.0 60 2.0 20 0.1 1.5 25 4 25 Min OP177B Typ 25 0.1 0.5 1.5 2.4 8 ± 13.5 140 120 6000 ± 13.0 60 2.0 Max 55 0.3 2.0 25 4 25 Units µV µV/°C nA pA/°C nA p A /° C V dB dB V/mV V mW mA
Conditions (Note 1) (Note 2)
0.2 (Note 2) (Note 3) VCM = ± 1 3 V VS = ± 3 V to ± 18 V RL 2 k, VO = ± 10 V4 RL 2 k VS = ± 15 V, No Load VS = ± 15 V, No Load ± 13 120 120 2000 ± 12
0.2 ± 13 120 110 2000 ± 12
75 2.5
75 2.5
NOTES 1 TCVOS is 100% tested. 2 Guaranteed by endpoint limits. 3 Guaranteed by CMRR test condition. 4 To insure high open-loop gain throughout the ± 10 V output range, A VO is tested at 10 V VO 0 V, 0 V VO +10 V, and 10 V VO +10 V. Specifications subject to change without notice.
2
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ELECTRICAL CHARACTERISTICS
Parameter Input Offset Voltage Long-Term Input Offset Voltage Stability Input Offset Current Input Bias Current Input Noise Voltage Input Noise Current Input Resistance Differential-Mode Input Resistance Common-Mode Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain Output Voltage Swing Symbol VOS Conditions
(@ VS =
Min
15 V, TA = +25 C, unless otherwise noted)
OP177E Typ Max 4 0.2 0.3 1.0 118 3 45 200 ± 14 140 125 12000 ± 14.0 ± 13.0 ± 12.5 0.3 0.6 60 50 3.5 1.6 ±3 10 Min OP177F Typ 10 0.3 0.3 1.2 118 3 45 200 ± 14 140 125 12000 ± 14.0 ± 13.0 ± 12.5 0.3 0.6 60 50 3.5 1.6 ±3 Max 25 Min OP177G Typ 20 0.4 0.3 1.2 118 3 45 200 ± 14 140 120 6000 ± 14.0 ± 13.0 ± 12.5 0.3 0.6 60 50 3.5 1.6 ±3 Max 60
OP177
Units µV µV/Mo nA nA nV rms pA rms M G V dB dB V/mV V V V V/µs MHz mW mW mA mV
VOS/Time (Note 1) I OS IB fo = 1 Hz to 100 Hz2 en in fo = 1 Hz to 100 Hz2 RI N RINCM IVR CMRR PSRR AV O VO (Note 3)
0.2
1.0 1.5 150 8
0.2
1.5 2.0 150 8
0.2
2.8 2.8 150 8
26 ± 13 130 120 5000 ± 13.5 ± 12.5 ± 12.0 0.1 0.4
26 ± 13 130 115 5000 ± 13.5 ± 12.5 ± 12.0 0.1 0.4
18.5 ± 13 115 110 2000 ± 13.5 ± 12.5 ± 12.0 0.1 0.4
(Note 4) VCM = ± 13 V VS = ±3 V to ± 18 V RL 2 k, VO = ± 1 0 V 5 RL 10 k RL 2 k RL 1 k RL 2 k2 AVCL = +12 VS = ± 15 V, No Load VS = ±3 V, No Load VS = ±15 V, No Load RP = 20 k
Slew Rate Closed-Loop Bandwidth Open-Loop Output Resistance Power Consumption Supply Current Offset Adjustment Range
SR BW RO PD I SY
60 4.5 2.0
60 4.5 2.0
60 4.5 2.0
NOTES 1 Long-Term Input Offset Voltage Stability refers to the averaged trend line of V OS vs. time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in V OS during the first 30 operating days are typically less than 2.0 µV. 2 Sample tested. 3 Guaranteed by design. 4 Guaranteed by CMRR test condition. 5 To insure high open-loop gain throughout the ± 10 V output range, A VO is tested at 10 V VO 0 V, 0 V VO +10 V, and 10 V VO +10 V. Specifications subject to change without notice.
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