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Details, datasheet, quote on part number:OP37A
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Datasheet text preview:
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FEATURES Low Noise, 80 nV p-p (0.1 Hz to 10 Hz) 3 nV/Hz @ 1 kHz Low Drift, 0.2 V/ C High Speed, 17 V/ s Slew Rate 63 MHz Gain Bandwidth Low Input Offset Voltage, 10 V Excellent CMRR, 126 dB (Common-Voltage @ 11 V) High Open-Loop Gain, 1.8 Million Replaces 725, OP-07, SE5534 In Gains > 5 Available in Die Form GENERAL DESCRIPTION
Low Noise, Precision, High Speed Operational Amplifier (A VCL > 5) OP37
The output stage has good load driving capability. A guaranteed swing of 10 V into 600 and low output distortion make the OP37 an excellent choice for professional audio applications. PSRR and CMRR exceed 120 dB. These characteristics, coupled with long-term drift of 0.2 µV/month, allow the circuit designer to achieve performance levels previously attained only by discrete designs. Low-cost, high-volume production of the OP37 is achieved by using on-chip zener-zap trimming. This reliable and stable offset trimming scheme has proved its effectiveness over many years of production history. The OP37 brings low-noise instrumentation-type performance to such diverse applications as microphone, tapehead, and RIAA phono preamplifiers, high-speed signal conditioning for data acquisition systems, and wide-bandwidth instrumentation.
PIN CONNECTIONS 8-Lead Hermetic DIP (Z Suffix) Epoxy Mini-DIP (P Suffix) 8-Lead SO (S Suffix)
VOS TRIM 1 IN 2 +IN 3 V 4
8
The OP37 provides the same high performance as the OP27, but the design is optimized for circuits with gains greater than five. This design change increases slew rate to 17 V/µs and gain-bandwidth product to 63 MHz. The OP37 provides the low offset and drift of the OP07 plus higher speed and lower noise. Offsets down to 25 µV and drift of 0.6 µV/°C maximum make the OP37 ideal for precision instrumentation applications. Exceptionally low noise (en= 3.5 nV/ @ 10 Hz), a low 1/f noise corner frequency of 2.7 Hz, and the high gain of 1.8 million, allow accurate high-gain amplification of low-level signals. The low input bias current of 10 nA and offset current of 7 nA are achieved by using a bias-current cancellation circuit. Over the military temperature range this typically holds IB and IOS to 20 nA and 15 nA respectively.
OP37
VOS TRIM
7 V+ 6 OUT 5 NC
NC = NO CONNECT
SIMPLIFIED SCHEMATIC
V+ R3 Q6 R1* 1 8 R4 R2* C2 Q22 Q21 R23 Q23 R24 Q24 R9 Q20 Q1A NON-INVERTING INPUT (+) Q3 INVERTING INPUT () *R1 AND R2 ARE PERMANENTLY ADJUSTED AT WAFER TEST FOR MINIMUM OFFSET VOLTAGE. V Q11 Q12 Q27 Q28 Q26 Q45 Q1B Q2B Q2A R5 C3 R12 C4 Q19 OUTPUT C1 Q46
VOS ADJ.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002
OP37
ABSOLUTE MAXIMUM RATINGS 4 ORDERING GUIDE
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 V Internal Voltage (Note 1 ) . . . . . . . . . . . . . . . . . . . . . . . . . 22 V Output Short-Circuit Duration . . . . . . . . . . . . . . . . . Indefinite Differential Input Voltage (Note2) . . . . . . . . . . . . . . . . . 0.7 V Differential Input Current (Note 2) . . . . . . . . . . . . . . . . 25 mA Storage Temperature Range . . . . . . . . . . . . . 65°C to +150°C Operating Temperature Range OP37A . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to +1 25°C OP37E (Z) . . . . . . . . . . . . . . . . . . . . . . . . . . 25°C to +85°C OP37E, OP-37F (P) . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C OP37G (P, S, Z) . . . . . . . . . . . . . . . . . . . . . 40°C to +85°C Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C Junction Temperature . . . . . . . . . . . . . . . . . . 45°C to +150°C Package Type JA3 JC 16 43 43 Unit °C/W °C/W °C/W 8-Lead Hermetic DIP (Z) 148 8-Lead Plastic DIP (P) 103 8-Lead SO (S) 158
TA = 25°C VOS MAX (µV) 25 25 60 100 100
CerDIP 8-Lead OP37AZ * OP37EZ
Plastic 8-Lead OP37EP OP37FP* OP37GP OP37GS
Operating Temperature Range MIL IND/COM IND/COM XIND XIND
OP37GZ
*Not for new design, obsolete, April 2002.
NOTES 1 For supply voltages less than 22 V, the absolute maximum input voltage is equal to the supply voltage. 2 The OP37's inputs are protected by back-to-back diodes. Current limiting resistors are not used in order to achieve low noise. If differential input voltage exceeds 0.7 V, the input Current should be limited to 25 mA. 3 JA is specified for worst case mounting conditions, i.e., JA is specified for device in socket for TO, CerDIP, P-DIP, and LCC packages; JA is specified for device soldered to printed circuit board for SO package. 4 Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP37 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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REV. A
OP37
SPECIFICATIONS ( V =
S
15 V, TA = 25 C, unless otherwise noted.)
Min OP37A/E Typ Max 10 0.2 7 ± 10 25 1.0 35 ± 40 0.18 5.5 4.5 3.8 4.0 2.3 0.6 0.9 Min OP37F Typ Max 20 0.3 9 ± 12 0.08 3.5 3.1 3.0 1.7 1.0 0.4 45 2.5 ± 11 106 10 ± 12.3 123 1 10 ± 11 100 60 1.5 50 ± 55 0.18 5.5 4.5 3.8 4.0 2.3 0.6 0.7 Min OP37G Typ Max 30 0.4 12 ± 15 0.09 3.8 3.3 3.2 1.7 1.0 0.4 4 2 ± 12.3 120 2 20 100 2.0 75 ± 80 0.25 8.0 5.6 4.5 Unit µV µV/Mo nA nA µV p-p nV/ Hz
Parameter Input Offset Voltage Long-Term Stability Input Offset Current Input Bias Current Input Noise Voltage Input Noise Voltage Density Input Noise CurrentDensity Input Resistance Differential Mode Input Resistance Common Mode Input Voltage Range Common Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain
Symbol V OS VOS/Time IOS IB enp-p en
Conditions Note 1 Notes 2, 3
1 Hz to 10 Hz3, 5 fO = 10 Hz3 fO = 30 Hz3 fO = 1000 Hz3 fO = 10 Hz3, 6 fO = 30 Hz3, 6 fO = 1000 Hz3, 6 Note 7 1.3
0.08 3.5 3.1 3.0 1.7 1.0 0.4 6 3 ± 11 ± 12.3 126 1
iN
pA/ Hz 0.6 M G V dB µV/ V
RIN R INCM IVR CMRR PSSR AVO
V CM = ± 1 1 V VS = ± 4 V to ± 18 V RL 2 k, V O = ± 10 V RL 1 k, Vo = ± 10 V RL 600 , VO = ± 1 V, V S ± 44 RL 2 k RL 600 RL 2k 4 fO = 10 kHz4 fO = 1 MHz VO = 0, IO = 0 VO = 0 RP = 10 k
114
1000 800 250
1800 1500 700
1000 800 250
1800 1500 700
700 400 200
1500 1500 500
V/m V V/m V V/m V V V V/µs MHz MHz 170 mW mV
Output Voltage Swing
VO
Slew Rate SR Gain Bandwidth Product GBW Open-Loop Output Resistance RO Power Consumption Pd Offset Adjustment Range
± 12.0 ± 13.8 ± 10 ± 11.5 11 17 45 63 40 70 90 ±4 140
± 12.0 ± 13.8 ± 10 ± 11.5 11 17 45 63 40 70 90 ±4 140
± 11.5 ± 13.5 ± 10 ± 11.5 11 17 45 63 40 70 100 ±4
NOTES 1 Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power. A/E grades guaranteed fully warmed up. 2 Long term input offset voltage stability refers to the average trend line of V OS vs. Time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in V OS during the first 30 days are typically 2.5 µV--refer to typical performance curve. 3 Sample tested. 4 Guaranteed by design. 5 See test circuit and frequency response curve for 0.1 Hz to 10 Hz tester. 6 See test circuit for current noise measurement. 7 Guaranteed by input bias current.
REV. A
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