|Category||Memory => Flash|
|Description||32M Bit, 2.7-Volt Read And 2.7-Volt Byte-write Sectored Flash, Dual Plane, Bottom Boot|
|Datasheet||Download AT49BV3218 datasheet
Single Voltage Read/Write Operation: to 3.3V (BV), to 3.6V (LV) Access Time 85 ns Sector Erase Architecture
Sixty-three 32K Word (64K Byte) Sectors with Individual Write Lockout Eight 4K Word (8K Byte) Sectors with Individual Write Lockout Fast Word Program Time 15 µs Fast Sector Erase Time 200 ms Dual-plane Organization, Permitting Concurrent Read while Program/Erase Memory Plane A: Eight 4K Word and Fifteen 32K Word Sectors Memory Plane B: Forty-eight 32K Word Sectors Erase Suspend Capability Supports Reading/Programming Data from Any Sector by Suspending Erase of Any Different Sector Low-power Operation 25 mA Active 10 µA Standby Data Polling, Toggle Bit, Ready/Busy for End of Program Detection RESET Input for Device Initialization Sector Lockdown Support TSOP and CBGA Package Options Top or Bottom Boot Block Configuration Available 128-bit Protection RegisterDescription
The to 3.6V (LV) 32-megabit Flash memory organized as 2,097,152 words of 16 bits each or 4,194,304 bytes of 8 bits each. The x16 data appears - I/O15; the x8 data appears - I/O7. The memory is divided into 71 sectors for erase operations. The device is offered in 48lead TSOP and 48-ball CBGA packages. The device has CE and OE control signals to avoid any bus contention. This device can be read or reprogrammed using a single 2.65V power supply, making it ideally suited for in-system programming.
Pin Name OE WE RESET RDY/BUSY VPP I/O15 (A-1) BYTE NC Function Addresses Chip Enable Output Enable Write Enable Reset READY/BUSY Output Optional Power Supply Data Inputs/Outputs I/O15 (Data Input/Output, Word Mode) A-1 (LSB Address Input, Byte Mode) Selects Byte or Word Mode No Connect
*Either pin 13 or pin 14 (TSOP package) or ball B3 or ball C4 (CBGA package) can be connected to VPP or both pins can be unconnected.
The device powers on in the read mode. Command sequences are used to place the device in other operation modes such as program and erase. The device has the capability to protect the data in any sector (see Sector Lockdown section). The device is segmented into two memory planes. Reads from memory plane B may be performed even while program or erase functions are being executed in memory plane A and vice versa. This operation allows improved system performance by not requiring the system to wait for a program or erase operation to complete before a read is performed. To further increase the flexibility of the device, it contains an Erase Suspend feature. This feature will put the erase on hold for any amount of time and let the user read data from or program data to any of the remaining sectors within the same memory plane. There is no reason to suspend the erase operation if the data to be read is in the other memory plane. The end of a program or an erase cycle is detected by the Ready/Busy pin, Data Polling or by the toggle bit. A six-byte command (Enter Single Pulse Program Mode) sequence to remove the requirement of entering the three-byte program sequence is offered to further improve programming time. After entering the six-byte code, only single pulses on the write control lines are required for writing into the device. This mode (Single Pulse Byte/Word Program) is exited by powering down the device, or by pulsing the RESET pin low for a minimum 500 ns and then bringing it back to VCC. Erase and Erase Suspend/Resume commands will not work while in this mode; if entered they will result in data being programmed into the device. It is not recommended that the six-byte code reside in the software of the final product but only exist in external programming code. The BYTE pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE pin is set at logic "1", the device is in word configuration, I/O0 I/O15 are active and controlled by CE and OE. If the BYTE pin is set at logic "0", the device is in byte configuration, and only data I/O pins - I/O7 are active and controlled by CE and OE. The data I/O pins - I/O14 are tri-stated, and the I/O15 pin is used as an input for the LSB (A-1) address function. 2
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