Details, datasheet, quote on part number: AT49BV8011T-12TI
PartAT49BV8011T-12TI
CategoryMemory => Flash => 8 Mb
Description8M Bit, 2.7-Volt Read And 2.7-Volt Byte-write Sectored Flash, Bottom Boot
CompanyATMEL Corporation
DatasheetDownload AT49BV8011T-12TI datasheet
Quote
Find where to buy
 
  

 

Features, Applications
Features

Single Supply for Read and Write: to 3.3V (BV), to 3.3V (LV) Access Time 90 ns Sector Erase Architecture

Fourteen 32K Word (64K Byte) Sectors with Individual Write Lockout Two 16K Word (32K Byte) Sectors with Individual Write Lockout Two 8K Word (16K Byte) Sectors with Individual Write Lockout Four 4K Word (8K Byte) Sectors with Individual Write Lockout Fast Word Program Time 20 s Fast Sector Erase Time 200 ms Dual Plane Organization, Permitting Concurrent Read while Program/Erase Memory Plane A: Four 4K Word, Two 8K Word and Two 16K Word Sectors Memory Plane B: Fourteen 32K Word Sectors Erase Suspend Capability Supports Reading/Programming Data from Any Sector by Suspending Erase of Any Different Sector Low-power Operation 25 mA Active 10 A Standby Data Polling, Toggle Bit, Ready/Busy for End of Program Detection Optional VPP Pin for Fast Programming RESET Input for Device Initialization Sector Program Unlock Command TSOP and CBGA Package Options Top or Bottom Boot Block Configuration Available

Description

The 3.3-volt 8-megabit Flash memory organized as 524,288 words of 16 bits each or 1,048,576 bytes of 8 bits each. The x16 data appears - I/O15; the x8 data appears - I/O7. The memory is divided into 22 sectors for erase operations. The device is offered in 48-pin TSOP and 48-ball CBGA packages. The device has CE, and OE control signals to avoid any bus

Addresses Chip Enable Output Enable Write Enable Reset READY/BUSY Output Optional Power Supply for Faster Program/Erase Operations Data Inputs/Outputs I/O15 (Data Input/Output, Word Mode) A-1 (LSB Address Input, Byte Mode) Selects Byte or Word Mode No Connect Output Power Supply

contention. This device can be read or reprogrammed using a single 2.7V power supply, making it ideally suited for in-system programming. The device powers on in the read mode. Command sequences are used to place the device in other operation modes such as Program and Erase. The device has the capability to protect the data in any sector. Once the data protection for a given sector is enabled, the data in that sector cannot be changed using input levels between ground and VCC. The device is segmented into two memory planes. Reads from memory plane B may be performed even while program or erase functions are being executed in memory plane A and vice versa. This operation allows improved system performance by not requiring the system to wait for a program or erase operation to complete before a read is performed. To further increase the flexibility of the device, it contains an Erase Suspend feature. This feature will put the Erase on hold for any amount of time and let the user read data from or program data to any of the remaining sectors within the same memory plane. There is no reason to suspend the erase operation if the data to be read is in the other memory plane. The end of a program or an Erase cycle is detected by the Ready/Busy pin, Data polling, or by the toggle bit.

A VPP pin is provided to improve program/erase times. This pin can be tied to VCC. To take advantage of faster programming and erasing, the pin should supply to 5.5 volts during program and erase operations. A 6-byte command (bypass unlock) sequence to remove the requirement of entering the 3-byte program sequence is offered to further improve programming time. After entering the 6-byte code, only single pulses on the write control lines are required for writing into the device. This mode (single-pulse byte/word program) is exited by powering down the device, or by pulsing the RESET pin low for a minimum 50 ns and then bringing it back to VCC. Erase and Erase Suspend/Resume commands will not work while in this mode; if entered they will result in data being programmed into the device. It is not recommended that the 6-byte code reside in the software of the final product but only exist in external programming code. The BYTE pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE pin is set at logic the device is in word configuration, - I/O15 are active and controlled by CE and OE. If the BYTE pin is set at logic "0", the device is in byte configuration, and only data I/O pins - I/O7 are active and controlled by CE and OE. The data I/O pins - I/O14 are tri-stated, and the I/O15 pin is used as an input for the LSB (A-1) address function.

READ: The AT49BV/LV8011(T) is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins are asserted on the outputs. The outputs are put in the high impedance state whenever OE is high. This dual line control gives designers flexibility in preventing bus contention. COMMAND SEQUENCES: When the device is first powered on it will be reset to the read or standby mode, depending upon the state of the control line inputs. In order to perform other device functions, a series of command sequences are entered into the device. The command sequences are shown in the Command Definitions table - I/O15 are don't care inputs for the command codes). The command sequences are written by applying a low pulse on the or CE input with or WE low (respectively) and OE high. The address is latched on the falling edge CE or WE, whichever occurs last. The data is latched by the first rising edge CE or WE. Standard microprocessor write timings are used. The address locations used in the command sequences are not affected by entering the command sequences. RESET: A RESET input pin is provided to ease some system applications. When RESET at a logic high level, the device is in its standard operating mode. A low level on the RESET input halts the present device operation and puts the outputs of the device in a high impedance state. When a high level is reasserted on the RESET pin, the device returns to the read or standby mode, depending upon the state of the control inputs. By applying 0.5V input signal to the RESET pin, any sector can be reprogrammed even if the sector lockout feature has been enabled (see "Sector Programming Lockout Override" section). ERASURE: Before a byte/word can be reprogrammed, it must be erased. The erased state of memory bits is a logical "1". The entire device can be erased by using the Chip Erase command or individual sectors can be erased by using the Sector Erase commands.


 

Related products with the same datasheet
AT49BV8011-12CC
AT49BV8011-12CI
AT49BV8011-12TC
AT49BV8011-12TI
AT49BV8011T
AT49BV8011T-12CC
AT49BV8011T-12CI
AT49BV8011T-12TC
AT49BV8011-11CI
Some Part number from the same manufacture ATMEL Corporation
AT49BV8192 8-megabit 512k X 16 CMOS Flash Memory
AT49BV8192A 8M Bit, 2.7-Volt Read And 2.7-Volt Byte-Write, Bottom Boot
AT49BV8192T 8-megabit 512k X 16 CMOS Flash Memory
AT49F001 128K X 8 (1M Bit), 5-Volt-Only, Bottom Boot Parametric Block Flash
AT49F001-12JC 1-Megabit (128K X 8) 5-volt Only Flash Memory, 50mA Active, 0.1mA Standby
AT49F001-55 128K X 8 (1M Bit), 5-Volt-Only, Bottom Boot Parametric Block Flash
AT49F001-55JC 1-Megabit (128K X 8) 5-volt Only Flash Memory, 50mA Active, 0.1mA Standby
AT49F001-70 128K X 8 (1M Bit), 5-Volt-Only, Bottom Boot Parametric Block Flash
AT49F001-70JC 1-Megabit (128K X 8) 5-volt Only Flash Memory, 50mA Active, 0.1mA Standby
AT49F001-90 128K X 8 (1M Bit), 5-Volt-Only, Bottom Boot Parametric Block Flash

AT17LV256A-10C : FPGA/PLD Configuration Memory Fpga Configuration EePROM Memory

ATV2500B-15KC : UV SPLD High-speed, High-density Uv-erasable Programmable Logic Device

U2008B-MFPG3 : Low-cost Phase-control ic With Soft Start

U7001BG-BFS : GAAS CT2 Front End ic

5962-0151101 : Triple Spacewire Links High Speed Controller

ATTINY13V-10PI : 8-bit Avr Microcontroller with 1K Byte Flash

AT89C4051-12SU : 8-bit Microcontroller with 4K Bytes Flash

ATMEGA6450V-8AUR : 8-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQFP64 Specifications: Data Bus: 8 Bit ; Life Cycle Stage: ACTIVE ; Clock Speed: 16 MHz ; ROM Type: Flash ; Supply Voltage: 4.5 to 5.5 volts ; I/O Ports: 53 ; Package Type: TQFP, Other, 14 X 14 MM, 1 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MS-026AEB, TQFP-64 ; Operating Range: Commercial ; Pin Count: 64 ; Opera

ATTINY461V-10SU : 8-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, QCC20 Specifications: Life Cycle Stage: ACTIVE ; Clock Speed: 16 MHz ; ROM Type: Flash ; Supply Voltage: 4.5 to 5.5 volts ; I/O Ports: 16 ; Package Type: QFNL, Other, 4 X 4 MM, 0.50 MM PITCH, GREEN, MO-220WGGD-2, QFN-32 ; Operating Range: Auto ; Pin Count: 20 ; Operating Temperature: -40 to 125 C (-40 to

 
0-C     D-L     M-R     S-Z