|Category||Multimedia => Audio => Synthesizers => Dream Sound Synthesis|
|Title||Dream Sound Synthesis|
|Description||128-voice Integrated Sound Synthesizer|
|Datasheet||Download ATSAM9708 datasheet
Two 64-voice RISC DSP Cores Two High-speed CISC Control Processor Versatile Programmable Digital Audio Routing Between the Two DSPs Voices Can Be Allocated for Synthesis and/or Effects and/or Audio Processing Maximum Single-shot PCM Wavesize of 4M Samples (93 Seconds @ 44.1 kHz) Samples Can Be Stored in 16-bit Floating Point Format (20-bit Dynamic), 16-bit Linear, 8-bit Linear Standard Audio Processing Firmware Includes Equalizer, Surround, MPEG Audio Decoder (Level 2) Sophisticated Built-in Cache Memories Allows Use of Standard ns 16-bit ROMs/RAMs Guarantees Crisp Response Even Under Heavy Traffic Conditions GS® Sound Set(1) under License from Roland® Corporation, Other Sound Sets Available 16-channel Audio-in, 16-channel Audio-out @ 22 Bits Audio/Channel 28-bit Internal Audio Path Two Serial MIDI-In, Two Serial MIDI-Out Firmware/Wavetable Data Can Reside in ROM, DRAM, SDRAM to 256M Bytes of External Memory with Support of SIMM (DRAM) and DIMM (SDRAM) High-speed 16-bit Burst Transfer for Firmware Download or Streaming Audio Compatible with ATSAM9707, Uses Proven Design and Development Tools Sound Editor, Sound Bank Editor Algorithm Compiler, Assembler, Source Debugger Direct Development from PC Environment, No Special Emulator Required Top Technology Single Low-frequency Crystal and Built-in PLL 3.3V Supply, 5V-tolerant I/Os Space-saving 144-lead TQFP Package Power-down Mode Typical Applications: Karaokes, High-range Multimedia, Classical Organs, Digital Pianos, Professional Keyboards, Musical Samplers 1. The GS Sound Set is subject to special licensing conditions. Not to be used for musical instruments.Description
The a 128-voice integrated synthesizer, integrating two PDSP blocks and a memory management unit (MMU). One PDSP block is a combination of a specialized 64-slot RISC-based digital signal processor (DSP), a general-purpose 16-bit CISC-based control processor (P16), a cache memory and an "intelligent" peripheral I/O interface. Both PDSPs are fully independent and share the same external memory through the MMU.16-bit CISC Processor Core Includes x 16 Data RAM x 16 Boot ROM
Name GND VCC1 VCC2 Pin Count Type PWR Function Power Ground. All GND pins should be returned to digital ground. Core Power, +3.3V nominal to 4.5V). All VC3 pins should be returned to +3.3V. Pad (except Memory Pad) Power, to +5.5V. All VCC pins should be returned to +5V (or 3.3V in case of single 3.3V supply). Memory Pad Power, to +5.5V. All VCC pins should be returned to +5V (for RAM or DRAM) or 3.3V (for SDRAM or 3.3V ROM).
Function 16-bit data bus to host processor. Information on these pins is: 2 x parallel MIDI (MPU-401 type applications) 2 x high-speed burst data transfers to/from external memory Selects one of 8 internal registers: 1: MPU-401 register processor 2, 3: Burst data (16-bit) processor MPU-401 register processor Burst data (16-bit) processor #2 Chip select from host, active low. Write from host, active low. Read from host, active low. Open drain output buffer. Driven low during 16-bit burst mode transfers to synchronize host to the ATSAM9708 memory. Open drain output buffer; driven low during 16-bit burst mode transfers. Indicates to host that a 16-bit I/O is in progress. Tri-state output pin, active high. Can be connected directly to host PC_IRQ line.
1. ISA bus group pins are powered by VCC1 power rail. 2. PC_D pads have 4 mA drive capabilities; other output pads have 16 mA drive capabilities. 3. To interface with PC ISA bus, VCC1 should be connected to 5V power and PC_D bus should be buffered. Direction is given by PC_RD signal. 4. Pin Names in this document exhibiting an overbar (PC_CS for example) indicates that the signal is active low.
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