|
|
Part: M44C510E
Category:
Microcontrollers
-> 4 bit
-> MARC4 Architecture
Description: Low-current Microcontroller For Wireless Communication, Tamb up to 125 C
Company: ATMEL Corporation
Datasheet: Download M44C510E datasheet File size : 1417 kB
Request For quote: Find where to buy M44C510E
Datasheet text preview:
M44C510E
MARC4 ญ 4-bit Universal Microcontroller
The M44C510E is a member of the Atmel Wireless & Microcontrollers' family of 4-bit single-chip microcontrollers. It contains ROM, RAM, up to 34 digital I/O pins, up to 10 maskable external interrupt sources, 4 maskable internal interrupts, a watchdog timer, interval timer, 2 x 8-bit multifunction timer/counter module and a versatile software configurable on-chip system clock module.
Features / Benefits
D Programmable system clock with prescaler and five different clock sources: ญ 4-MHz crystal oscillator ญ 32-kHz crystal oscillator ญ RC-oscillator fully integrated ญ RC-oscillator with external resistor adjustment ญ External clock input D Wide supply voltage range (2.2 V to 6.2 V) D Very low halt current (< 1 mA) D 4 KByte ROM, 256 x 4-bit RAM D 8 hardญ and software interrupt priority levels D Up to 10 external and 4 internal interrupts, bitwise maskable with programmable priority level D Up to 34 I/O lines including 8 high drive I/O-lines (20 mA, VDD = 5 V)
TE SCLIN OSCIN OSCOUT AVDD
D I/O ports ญ bitwise configurable with combined interrupt handling (for serial I/O applications) D 2 x 8-bit multifunction timer/counters D Coded reset and watchdog timer ** D Power-on reset and "brown out" function D Various power-down modes D Efficient, hardware-controlled interrupt handling D High-level programming language in qFORTH D Comprehensive library of useful routines D Windows 95/ NT based development tools
(** mask option)
VS S NRST VDD TIM1
Test Sleep
System clock
Real time clock
Master reset
ROM
4K x 8 bit
RAM
256 x 4 bit
Timer/ counter Watchญ dog Prescaler Timer 1 Timer 0 Melody & buzzer
MARC4
4ญbit CPU core I/O bus
I/O I/O
4 4 4
I/O I/O
4
I/O
Interrupt & reset
4
I/O
Interrupt
4
I/O I/O
Interrupt
4 2
I/O
4
Port 0 Port 1 Port 5 Port 7
Port A
Port B
Port C
Port 6
Port 4
13374
Figure 1. Block diagram
Rev. A2, 26-Feb-01
1 (60)
Preliminary Information
M44C510E
SCLIN BP61 AVDD O SC O U T OSCIN B PC 3 B PC 2 NRST BPA0 BPA1 25 BP12 20 BPA2 21 BP11 24 VSS BPA3 BP10 22 23 BPB3 BPB2 35 BPB1 34 BPB0 33 BP70 BP71 BP72 BP73 BP60 37
44
43
42
41
40
39
38
36
32
31
30
29
28
27
M44C510E
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TIM1 15
BPC1 16 17 TE
Figure 2. Pin connections SSO44-package Table 1 Pin description
มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม มมมมมมมมมมมมมมมมมมมมมมมมมมม ม มมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม ม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม ม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม ม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม ม ม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมม มมมมมม ม ม ม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม ม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม ม ม ม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม มมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม ม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม ม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมม ม มมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม ม ม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม มมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม ม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม ม ม ม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม ม มมมมมม มมมมมมมมมมมมมมมมมมมมมมมมมมมมมมมม มมมมมม
Function Power supply voltage +2.2 V to +6.2 V Analog power supply voltage +2.2 V to +6.2V Circuit ground 4 I/O lines of Port 0 ญ automatic nibblewise configurable 4 I/O lines of Port 1(*) ญ automatic nibblewise configurable 4 I/O lines of high current Port 5(*) ญ bitwise configurable 4 I/O lines of high current Port 7(*) ญ bitwise configurable 4 I/O lines of Port A(*) ญ bitwise configurable, as inputs for port monitor module and optional coded reset inputs (*) BPB0 ญ BPB3 4 I/O lines of Port B(*) ญ bitwise configurable I/O and as inputs for port monitor module BPC0 ญ BPC3 4 I/O lines of Port C (*) ญ bitwise configurable I/O BP60 ญ BP61 2 I/O lines of Port 6 (*) ญ bitwise configurable I/O or as external programmable interrupts BP40 I/O line BP40 of Port 4(*) ญ configurable or timer/counter I/O T0OUT0 (T0OUT0) BP41 I/O line BP41 of Port 4(*) ญ configurable or timer/counter I/O T0OUT1 (T0OUT1) BP42 (BUZ) High current I/O line BP42 of Port 4(*) ญ configurable or buzzer output BUZ BP43 (NBUZ) High current I/O line BP43 of Port 4(*) ญ configurable or buzzer output NBUZ TIM1 Dedicated I/O for Timer 1 SCLIN External trimming resistor or external clock input OSCIN 32-kHz quartz crystal or 4-MHz quartz crystal input pin OSCOUT 32-kHz quartz crystal or 4-MHz quartz crystal output pin TE Testmode input, used to control the production test modes (internal pull-down) NRST Reset input (/output), a logic low on this pin resets the device. An internal watchdog or coded reset can generate a low pulse on this pin.
Name VDD AVDD VSS BP00 ญ BP03 BP10 ญ BP13 BP50 ญ BP53 BP70 ญ BP73 BPA0 ญ BPA3
(*) For mask options, please see the order information.
2 (60)
BPC 0 18 BP13 19
VSS BP53
BP03
BP02
BP01
BP52
BP51
BP50
BP43
BP42
BP41
BP40
VDD
BP00
26
Rev. A2, 26-Feb-01
Preliminary Information
M44C510E
Table of Contents
1 MARC4 Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Components of MARC4 Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2.1 ROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2.2 RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2.3 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2.4 ALU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2.5 Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2.6 I/O Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Interrupt Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3.1 Hardware Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3.2 Software Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 Hardware Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5.1 Clock Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5.2 Oscillator Circuits and External Clock Input Stage . . . . . . . . . . . . . . . . . . . . . . . . RC-Oscillator 1 Fully Integrated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Input Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RC-Oscillator 2 with External Trimming Resistor . . . . . . . . . . . . . . . . . . . . . . . . . 4-MHz Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32-kHz Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5.3 Clock Management Register (CM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Configuration Register (SC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5.4 Power-down Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5.5 Clock Monitor Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Peripheral Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Addressing Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Bidirectional Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.1 Bidirectional Port 0 and Port 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.2 Bidirectional Port 5, Port 7 and Port C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.3 Bidirectional Port A and Port B with Port Monitor Function . . . . . . . . . . . . . . . . 2.2.4 Bidirectional Port 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.5 Bidirectional Port 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.6 TIM1 ญ Dedicated Timer 1 I/O Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 Interval Timers / Prescaler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.1 Interval Timer Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 Timer/Counter Module (TCM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5.1 General Timer/Counter Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5.2 Timer/Counter in 16-bit Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5.3 Timer 0 Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5.4 Timer 1 Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 5 5 6 6 9 9 9 9 11 11 12 13 13 14 14 14 14 15 15 15 16 16 17 17 17 20 21 22 22 24 26 27 27 28 29 29 31 34 34 43
2
Rev. A2, 26-Feb-01
3 (60)
Preliminary Information
Others parts begin by m4
|
|
|
