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Part: TSC80C31-25MG/883
Category:
Description: CMOS Single-chip 8 Bit Microcontroller, External ROM, 128 Bytes of RAM, 32 I/o Lines, 16 Bit Timers, 25 MHZ
Company: ATMEL Corporation
Datasheet: Download TSC80C31-25MG/883 datasheet File size : 174 kB
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Datasheet text preview:
TS80C31X2
8-bit CMOS Microcontroller ROMless
1. Description
TS80C31X2 is high performance CMOS and ROMless versions of the 80C51 CMOS single chip 8-bit microcontroller. The TS80C31X2 retains all features of the TSC80C31 with 128 bytes of internal RAM, a 5-source, 4 priority level interrupt system, an on-chip oscilator and two timer/ counters. In addition, the TS80C31X2 has a dual data pointer, a more versatile serial channel that facilitates multiprocessor communication (EUART) and a X2 speed improvement mechanism. The fully static design of the TS80C31X2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data. The TS80C31X2 has 2 software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the timers, the serial port and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative.
2. Features
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80C31 Compatible · 8031 pin and instruction compatible · Four 8-bit I/O ports · Two 16-bit timer/counters · 128 bytes scratchpad RAM
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Interrupt Structure with · 5 Interrupt sources, · 4 priority level interrupt system
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Full duplex Enhanced UART · Framing error detection · Automatic address recognition
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High-Speed Architecture · 40 MHz @ 5V, 30MHz @ 3V · X2 Speed Improvement capability (6 clocks/ machine cycle) 30 MHz @ 5V, 20 MHz @ 3V (Equivalent to 60 MHz @ 5V, 40 MHz @ 3V)
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Power Control modes · Idle mode · Power-down mode · Power-off Flag
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Dual Data Pointer Asynchronous port reset
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Once mode (On-chip Emulation) Power supply: 4.5-5.5V, 2.7-5.5V Temperature ranges: Commercial (0 to 70oC) and Industrial (-40 to 85oC) Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP F1 (13.9 footprint)
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Rev. C - 15 January, 2001
1
TS80C31X2
3. Block Diagram
RxD XTAL1 XTAL2 ALE/ PROG PSEN CPU EA RD WR (1) (1) Timer 0 Timer 1 INT Ctrl Parallel I/O Ports & Ext. Bus Port 0 Port 1 Port 2 Port 3 EUART RAM 128x8 TxD
C51 CORE
(1) (1)
IB-bus
(1) (1) RESET T0 T1
(1) (1) P1 P2 INT0 INT1 P0 P3
(1): Alternate function of Port 3
2
Rev. C - 15 January, 2001
TS80C31X2
4. SFR Mapping
The Special Function Registers (SFRs) of the TS80C31X2 fall into the following categories: · C51 core registers: ACC, B, DPH, DPL, PSW, SP, AUXR1 · I/O port registers: P0, P1, P2, P3 · Timer registers: TCON, TH0, TH1, TMOD, TL0, TL1 · Serial I/O port registers: SADDR, SADEN, SBUF, SCON · Power and clock control registers: PCON · Interrupt system registers: IE, IP, IPH · Others: CKCON Table 1. All SFRs with their address and their reset value Bit addressable
0/8 1/9 2/A 3/B
Non Bit addressable
4/C
5/D
6/E
7/F
F8h F0h E8h E0h D8h D0h C8h C0h B8h B0h A8h A0h 98h 90h 88h 80h
IP XXX0 0000 P3 1111 1111 IE 0XX0 0000 P2 1111 1111 SCON 0000 0000 P1 1111 1111 TCON 0000 0000 P0 1111 1111 0/8 TMOD 0000 0000 SP 0000 0111 1/9 TL0 0000 0000 DPL 0000 0000 2/A TL1 0000 0000 DPH 0000 0000 3/B 4/C 5/D 6/E TH0 0000 0000 TH1 0000 0000 CKCON XXXX XXX0 PCON 00X1 0000 7/F SBUF XXXX XXXX SADDR 0000 0000 AUXR1 XXXX XXX0 SADEN 0000 0000 IPH XXX0 0000 PSW 0000 0000 ACC 0000 0000 B 0000 0000
FFh F7h EFh E7h DFh D7h CFh C7h BFh B7h AFh A7h 9Fh 97h 8Fh 87h
reserved
Rev. C - 15 January, 2001
3
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