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Part: 2N4340
Category:
Discrete
-> Transistors
-> FETs (Field Effect Transistors)
-> PHEMTs
Description: 50 V, N-channel JFET Low Noise Amplifier
Company: Calogic, LLC
Datasheet: Download 2N4340 datasheet File size : 213 kB
Request For quote: Find where to buy 2N4340
Datasheet text preview:
N-Channel JFET Low Noise Amplifier
CORPORATION
2N4338 2N4341
FEATURES ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise noted) Gate-Source or Gate-Drain Voltage . . . . . . . . . . . . . . . . -50V Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA Storage Temperature Range . . . . . . . . . . . . . -65oC to +200oC Operating Temperature Range . . . . . . . . . . . -55oC to +175oC Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300oC Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mW Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . . 2.0mW/ oC
NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or an y other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
· Exceptionally High Figure of Merit · Radiation Immunity t · Exgrhemely Low Noise and Capacitance · Hi Input Impedance · Low-level Choppers · Data Switches · Multiplexers and Low Noise Amplifiers
PIN CONFIGURATION
APPLICATIONS
ORDERING INFORMATION Part
TO-18
Package Hermetic TO-18 Sorted Chips in Carriers
Temperature Range -55oC to +175oC -55oC to +175oC
2N4338-41 X2N4338-41
G,C
5010
D
S
ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise specified)
SYM BOL IGSS BVGSS VGS(off) ID(off) IDSS gfs gos rDS(on) Cis s Cr s s PARAMETER Gate Reverse Current 2N4338 2N4339 2N4340 2N4341 UNITS MIN MAX MIN MAX MIN MAX MIN MAX -0.1 -0.1 -0.1 -0.1 nA TA = 150 oC -50 -0. 3 -1 0.05 (-5) 0.2 0.6 0.5 -0.1 -50 -0. 6 -1. 8 0.05 (-5) 1.5 1.2 -0.1 -50 -1 -3 0.05 (-5) 3.6 3 -0.1 -50 -2 -6 0.07 (-10) 9 -0.1 µA V nA (V) mA µS ohm pF TEST CONDITIONS VGS = -30V, VDS = 0 IG = -1µA, VDS = 0 VDS = 15V, ID = 0.1µA VDS = 15V, VGS = ( ) VDS = 15V, VGS = 0 VDS = 15V, VGS = 0 VDS = 0, IDS = 0 VDS = 15V, VGS = 0 (Note 1) f = 1MHz VDS = 15V, VGS = 0 Rgen = 1meg, BW = 200Hz
Gate -Sou rce Breakdown Voltage Gate -Sou rce Cutoff Voltage Drain Cutoff Current Satura tio n Drain Current (Note 2) Com mon -Sou rce Forward Tra nsconductance (Note 2) Com mon -Source Output Conductance Drai n-So urce ON Resistance Com mon -Sou rce Input Capacitance Com mon -Source Reverse Transfer Cap acita nce Noi se Figure (Note 1)
600 1800 800 2400 1300 3000 2000 4000 5 2500 7 3 15 1700 7 3 30 1500 7 3 60 800 7 3
f = 1kHz
NF
1
1
1
1
dB
f = 1kHz
NOTES: 1. For design reference only, not 100% tested. 2. Pulse test duration 2ms (non-JEDEC Condition).
Others parts begin by 2n
2N-1 2N-2 2N-3 2N-4 2N-5 2N-6 2N-7 2N-8 2N-9 2N-10 2N-11 2N-12 2N-13 2N-14 2N-15 2N-16 2N-17 2N-18 2N-19 2N-20 2N-21 2N-22 2N-23 2N-24 2N-25 2N-26 2N-27 2N-28 2N-29 2N-30 2N-31
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