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Details, datasheet, quote on part number:3N165
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| Part: | 3N165 |
| Category: | Discrete => Transistors => FETs (Field Effect Transistors) => MOSFETs |
| Description: | 40 V, Monolithic Dual P-channel Enhancement Mode JFET General Purpose Amplifier |
| Company: | Calogic, LLC |
| Datasheet: | Download 3N165 datasheet File size : 27 kB |
| Request For quote: | Find where to buy 3N165
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Datasheet text preview:
Monolithic Dual P-Channel Enhancement Mode MOSFET General Purpose Amplifier
3N165 / 3N166
FEATURES
CORPORATION
· Very High Impedance · High Gate Breakdown · Low Capacitance
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS (Note 1) (TA = 25oC unless otherwise specified) Drain-Source or Drain-Gate Voltage (Note 2) 3N165. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V 3N166. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V Transient Gate-Source Voltage (Note 3) . . . . . . . . . . . . . ±125 Gate-Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±80V Drain Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA Storage Temperature . . . . . . . . . . . . . . . . . . . -65oC to +200oC Operating Temperature . . . . . . . . . . . . . . . . . -55oC to +150oC Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300oC Power Dissipation One Side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mW Both Sides . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 525mW Total Derating above 25oC . . . . . . . . . . . . . . . . . . 4.2mW/ oC
NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or an y other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
BOTTOM VIEW
TO-99
D2 G2
S
D1 G1
C
0180
2506
C
G2 G1
D2 D1 S
ORDERING INFORMATION DEVICE SCHEMATIC
1 7
Part 3N165-66 X3N165-66
5
Package Hermetic TO-99 Sorted Chips in Carriers
Temperature Range -55oC to +150oC -55oC to +150oC
3
8
4
0190
ELECTRICAL CHARACTERISTICS (TA = 25oC and VBS = 0 unless otherwise specified)
SYMBOL IGSSR IGSSF IDSS ISDS ID(on) VGS(th) VGS(th) rDS(on) PARAMETER Gate Reverse Leakage Current Gate Forward Leakage Current Drai n to Source Leakage Current Sou rce to Drain Leakage Current On Drain Current Gate Source Threshold Voltage Gate Source Threshold Voltage Drai n Source ON Resistance -5 -2 -2 MIN MAX 10 -10 -25 -200 -400 -30 -5 -5 300 ohms mA V pA VDS = -20V VSD = -20V, VDB = 0 VDS = -15V, VGS = -10V VDS = -15V, ID = -10µA VDS = VGS, I D = -10µA VGS = -20V, ID = -100µA UNITS VGS = 40V VGS = -40V TA = +125oC TEST CONDITIONS
3N165 / 3N166
CORPORATION
ELECTRICAL CHARACTERISTICS (Continued) (TA = 25oC and VBS = 0 unless otherwise specified)
SYMBOL gfs gos Cis s Cr s s Coss RE(Yfs) PARAMETER Fo rward Transconductance Outp ut Admittance In pu t Capacitance Reverse Transfer Capacitance Outp ut Capacitance Com mon Source Forward Transconductance 1200 MIN 1500 M AX 3000 300 3. 0 0.7 3. 0 µs VDS = -15V, ID = -10mA, f = 100MHz (Note 4) pF VDS = -15V, ID = -10mA, f = 1MHz (Note 4) UNITS µS TEST CONDITIONS VDS = -15V, ID = -10mA, f = 1kHz
MATCHING CHARACTERISTICS
SYMBOL Yfs1 / Yfs2 VGS1-2 VGS1-2 T NOTES: 1. 2. 3. 4.
3N165
MIN 0.90 MAX 1.0 100 100 mV µV/ oC UNITS TEST CONDITIONS VDS = -15V, ID = -500µA, f = 1kHz VDS = -15V, ID = -500µA VDS = -15V, IA = -500µA TA = -55oC to +25 oC
PARAMETER Forward Transconductance Ratio Gate Source Threshold Voltage Differential Gate Source Threshold Voltage Differential Cha ng e with Temperature
See handling precautions on 3N170 data sheet. Per transistor. Devices must not be tested at ±125V more than once, nor longer than 300ms. Fo r design reference only, not 100% tested.
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