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Part: IT1700

Category:
 Discrete
   -> Transistors
     -> FETs (Field Effect Transistors)
       -> MOSFETs

Description: 40 V, P-channel Enhancement Mode MOSFET General Purpose Amplifier

Company: Calogic, LLC

Datasheet: Download IT1700 datasheet     File size : 69 kB

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Datasheet text preview:
P-Channel Enhancement Mode MOSFET General Purpose Amplifier
IT1700
FEATURES
CORPORATION
· Low ON-Resistance · High Gain w Voltage · LoghNoise Impedance · Hi Input · Low Leakage
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise specified) Drain-Source and Gate-Source Voltage . . . . . . . . . . . . . -40V Peak Gate-Source Voltage (Note 1) . . . . . . . . . . . . . . . ±125V Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA Storage Temperature . . . . . . . . . . . . . . . . . . -65oC to +200oC Operating Temperature Range . . . . . . . . . . . -55oC to +150oC Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300oC Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375mW Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . . . 3mW/ oC
NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or an y other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
TO-72
ORDERING INFORMATION Part
C G S D
Package Hermetic TO-72 Sorted Chips in Carriers
Temperature Range -55oC to +150oC -55oC to +150oC
IT1700 XIT1700
1503
IT1700
CORPORATION
ELECTRICAL CHARACTERISTICS (TA = 25oC and VBS = 0 unless otherwise specified)
SYM BOL BVDSS BVSDS IGSS IDSS IDSS (150 C) ISDS ISDS (150 C) V GS (t h ) rDS(on) IDS(on) gfs Cis s Cr s s Coss
o o
PARAMETER Drai n to Source Breakdown Voltage Sou rce to Drain Breakdown Voltage Gate Leakage Current Drai n to Source Leakage Current Drai n to Source Leakage Current Sou rce to Drain Leakage Current Sou rce to Drain Leakage Current Gate Threshold Voltage Sta tic Drain to Source "on" Resistance Drain to Source "on" Current Fo rward Transconductance Common Source Sm all Signal, Short Circuit, Common Source, Input Capacitance Sm all Signal, Short Circuit, Common Source, Reverse Transfer Capacitance Sm all Signal, Short Circuit, Common Source, Output Capacitance
MIN -40 -40
M AX UNITS V V
TEST CONDITIONS VGS = 0, I D = -10µA VGS = 0, I D = -10µA
(See note 2) 200 0. 4 400 0. 8 -2 -5 400 2 2000 4000 5 1. 2 3. 5 pA µA pA µA V ohms mA µS pF pF pF VGS = VDS, I D = -10µA VGS = -10V, VDS = 0 VGS = -10V, VDS = -15V VDS = -15V, ID = -10mA, f = 1kHz VDS = -15V, ID = -10mA f = 1MHz (Note 3) VDG = -15V, I D = 0 f = 1MHz (Note 3) VDS = -15V, ID = -10mA f = 1MHz (Note 3) VGS = 0, VDS = -20V
NOTES: 1. Device must not be tested at ±125V more than once nor longer than 300ms. 2. Actu al gate current is immeasurable. Package suppliers are required to guarantee a package leakage of < 10pA. External package leakage is the dominant mode which is sensitive to both transient and storage environment, which cannot be guaranteed. 3. Fo r design reference only, not 100% tested.


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