|
|
Part: SST5912
Category:
Discrete
-> Transistors
-> FETs (Field Effect Transistors)
-> PHEMTs
Description: N-channel JFET Monolithic Dual
Company: Calogic, LLC
Datasheet: Download SST5912 datasheet File size : 466 kB
Request For quote: Find where to buy SST5912
Datasheet text preview:
N-Channel JFET Monolithic Dual
CORPORATION
SST5912
FEATURES DESCRIPTION The SST5912 is a High Speed N-Channel Monolithic JFET pair encapsulated in a surface mount plastic SO-8 package. The device is designed for high gain (typically > 6000 mmhos), low leakage ( < 1pA typically) and low noise, The SST5912 is an excellent choice for differential wideband amplifiers, VHF/UHF amplifiers and test and measurement. ORDERING INFORMATION Part Package Temperature Range -55oC to +150oC SST5912 Plastic SO-8 Package
· High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gfs > 6 mS · Low Leakage . . . . . . . . . . . . . . . . . . . . . . IG < 1pA typical · LowfaNoise Package · Sur ce Mount · Differential Wideband Amplifier · VHF/UHF Amplifiers · Test and Measurement
APPLICATIONS
NOTE: For Sorted Chips in Carriers, See 2N5911 Series
PIN CONFIGURATION
SO-8
TOP VIEW (1) S1 (2) D1 (3) G1 (4) N/C N/C (8) G2 (7) D2 (6) S2 (5)
CJ1
PRODUCT MARKING SST5912 SST5912
SST5912
CORPORATION
ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise noted) Parameter/Test Condition Gate-Drain Voltage Gate-Source Voltage Forward Gate Current Power Dissipation (per side) (total) Power Derating (per side) (total) Operating Junction Temperature Storage Temperature Lead Temperature (1/16" from case for 10 seconds) Symbol VGD VGS IG PD Limit -25 -25 50 300 500 2.4 4 -55 to 150 -65 to 150 300 Unit V V mA mW mW mW/ oC mW/ oC o C o C o C
TJ Tstg TL
ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise noted)
SYMBOL STATIC V(BR) GSS VGS(OFF) IDSS IGSS IG VGS VGS(F) DYNAMI C gfs gos gfs gos Cis s Crss en NF MATCHI NG | VGS1 - VGS2 | Differe ntial Gate Source Voltage 7 10 10 0.98 0.98 0.0 1 90 0.95 0.95 15 40 40 1 1 20 nA dB mV mV/ oC VDG = 10V, ID = 5mA T = -55 to 25oC T = 25 to 125 oC VDS = 10V, VGS = 0V VDG = 10V, ID = 5mA, f = 1kHz VDG = 10V, ID = 5mA, TA = 125oC VDD = 5 to 10V, ID = 5mA VDG = 10V ID = 5mA Common-Sou rce Forward Transconductance Common -Source Output Conductance Common-Sou rce Forward Transconductance Common -Source Output Conductance Common-Source Input Capacitance Common-Source Reverse Transfer Capacitance Equivale nt Input Noise Voltage Noise Figure 6 20 6 30 3.5 1 4 0. 1 5 5 10 100 10 150 5 1.2 20 1 mS mS mS mS pF VDG = 10V, ID = 5mA f = 1kHz VDG = 10V, ID = 5mA f = 100MHz VDG = 10V, ID = 5mA f = 1MHz Gate-Source Breakdown Voltage Gate -Source Cut off Voltage Satu ration Drain Current Gate Reverse Current Gate Operating Current Gate-Source Voltage Gate -Sou rce Forward Voltage
2
CHARACTERISTCS
TYP1
SST5912 MIN -25 -1 7 -5 40 -100 -100 -0.3 -4 MAX
UNIT
TEST CONDITIONS
-35 -3.5 15 -1 -0.2 -1 -0.2 -1.5 0. 7
V mA pA nA pA nA V
IG = -1mA, VDS = 0V VDS = 10V, ID = 1nA VDS = 10V, VGS = 0V VGS = -15V, VDS = 0V TA = 125 oC VDG = 10V, ID = 5mA TA = 125 oC VDG = 10V, ID = 5mA IG = 1mA, VDS = 0V
nV/ Hz VDG = 10V, ID = 5mA, f = 10kHz dB VDG = 10V, ID = 5mA, f = 10kHz, RG = 100W
D | VGS1 - VGS2 | Gate Source Voltage Differential Change with Tempe rature DT IDSS1 IDSS2 gfs1 gfs2 | IG1 - IG2 | CMRR Satu ration Drain Current Ratio Transcon ductance Ratio Differe nt ial Gate Current Common Mode Rejection Ratio
NOTES: 1. For design aid only, not subject to production testing. 2. Pulse test; PW = 300ms, duty cycle â 3%.
Others parts begin by ss
SS-1 SS-2 SS-3 SS-4 SS-5 SS-6 SS-7 SS-8 SS-9 SS-10 SS-11 SS-12 SS-13 SS-14 SS-15 SS-16 SS-17 SS-18 SS-19 SS-20 SS-21 SS-22 SS-23 SS-24 SS-25 SS-26 SS-27 SS-28 SS-29 SS-30 SS-31 SS-32 SS-33 SS-34
|
|
|
