Details, datasheet, quote on part number: 15CY7C109B-15VC
Part15CY7C109B-15VC
Category
Description128k X 8 Static RAM
CompanyCypress Semiconductor Corp.
DatasheetDownload 15CY7C109B-15VC datasheet
  

 

Features, Applications

Features

High speed tAA = 12 ns Low active power 495 mW (max. 12 ns) Low CMOS standby power 55 mW (max.) 4 mW 2.0V Data Retention Automatic power-down when deselected TTL-compatible inputs and outputs Easy memory expansion with CE1, CE2, and OE options put Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable One (CE1) and Write Enable (WE) inputs LOW and Chip Enable Two (CE2) input HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16). Reading from the device is accomplished by taking Chip Enable One (CE1) and Output Enable (OE) LOW while forcing Write Enable (WE) and Chip Enable Two (CE2) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CE1 HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or during a write operation (CE1 LOW, CE2 HIGH, and WE LOW). The CY7C109B is available in standard 400-mil-wide SOJ and 32-pin TSOP type I packages. The CY7C1009B is available a 300-mil-wide SOJ package. The CY7C1009B and CY7C109B are functionally equivalent in all other respects.

The is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE1), an active HIGH Chip Enable (CE2), an active LOW Out-

Maximum Access Time (ns) Maximum Operating Current (mA) Maximum CMOS Standby Current (mA) Maximum CMOS Standby Current (mA) Low Power Version 7C109B-35 7C1009B-35

Note: 1. For guidelines on SRAM system design, please refer to the `System Design Guidelines' Cypress application note, available on the internet at www.cypress.com.

(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature................................. to +150C Ambient Temperature with Power Applied............................................. to +125C Supply Voltage on VCC to Relative +7.0V DC Voltage Applied to Outputs in High 0.5V to VCC 0.5V DC Input 0.5V to VCC + 0.5V Current into Outputs (LOW).........................................20 mA Static Discharge Voltage............................................ >2001V (per MIL-STD-883, Method 3015) Latch-Up Current..................................................... >200 mA

7C109B-12 7C1009B-12 Parameter VOH VOL VIH VIL IIX IOZ IOS ICC Description Test Conditions Min. GND VI < VCC GND VI < VCC, Output Disabled VCC = Max., VOUT = GND VCC = Max., IOUT = 0 mA, f = fMAX 1 5 VCC Max. Output HIGH Voltage VCC = Min., IOH 4.0 mA Output LOW Voltage Input HIGH Voltage Input LOW Voltage[2] Input Load Current Output Leakage Current Output Short Circuit Current[3] VCC Operating Supply Current VCC = Min., IOL 7C109B-15 7C1009B-15 Min. 2.4 0.4 VCC Max. Unit A mA

Automatic CE Max. VCC, CE1 > VIH Power-Down Current CE2 < VIL, VIN > VIH or TTL Inputs VIN < VIL, f = fMAX Automatic CE Max. VCC, Power-Down Current CE1 > VCC < 0.3V, CMOS Inputs VIN > VCC 0.3V, or VIN < 0.3V,

Notes: 2. Minimum voltage is2.0V for pulse durations of less than 20 ns. 3. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.

Electrical Characteristics Over the Operating Range (continued)

7C109B-20 7C1009B-20 Parameter VOH VOL VIH VIL IIX IOZ IOS ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage[2] Input Load Current Output Leakage Current Output Short Circuit Current[3] VCC Operating Supply Current Automatic CE Power-Down Current TTL Inputs Automatic CE Power-Down Current CMOS Inputs GND VI < VCC GND VI < VCC, Output Disabled VCC = Max., VOUT = GND VCC = Max., IOUT = 0 mA, f = fMAX = 1/tRC Max. VCC, CE1 > VIH CE2 < VIL, VIN > VIH or VIN < VIL, f = fMAX Max. VCC, CE1 > VCC < 0.3V, VIN > VCC 0.3V, or VIN < 0.3V, Test Conditions VCC = Min., IOH 4.0 mA VCC = Min., IOL 8.0 mA Min. 2.4 0.4 VCC Max. 7C109B-25 7C1009B-25 Min. 2.4 0.4 VCC Max. 7C109B-35 7C1009B-35 Min. 2.4 0.4 VCC Max. Unit A mA

Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions = 1 MHz, VCC = 5.0V Max. 9 8 Unit pF

5V OUTPUT 30 pF INCLUDING JIG AND SCOPE (a) 480 5V OUTPUT 5 pF INCLUDING JIG AND SCOPE (b) R2 255 GND 3.0V ns ALL INPUT PULSES

Note: 4. Tested initially and after any design or process changes that may affect these parameters.

 

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