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Part: CY2CC910OC
Category:
Timing Circuits
-> Backplane Interface
Description: High Performance Clock And Data Buffers With Low Voltage Operations
Company: Cypress Semiconductor Corp.
Datasheet: Download CY2CC910OC datasheet File size : 207 kB
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Datasheet text preview:
COMLINKTM SERIES CY2CC910
1:10 Clock Fanout Buffer
Features
· Low-voltage operation · Full-range support: -- 3.3V -- 2.5V · · · · · · · · -- 1.8V Over voltage tolerant input hot swappable 1:10 fanout Drives either a 50-Ohm or 75-Ohm load Low-input capacitance Low-output skew Low-propagation delay Typical (tpd < 4 ns) High-speed operation: -- -200 MHz@1.8V -- 650 MHz@2.5V/3.3V · Industrial versions available · Available packages include: SOIC, SSOP
Description
The Cypress series of network circuits are produced using advanced 0.35 micron CMOS technology, achieving the industries fastest logic and buffers. The Cypress CY2CC910 fanout buffer features one input and ten outputs. Ideal for conversion from/to 3.3V/2.5V/1.8V Designed for Data Communications clock management applications, the large fanout from a single input reduces loading on the input clock. Cypress employs unique AVCMOS type outputs VOITM (Variable Output Impedance) that dynamically adjust for variable impedance matching and eliminate the need for series damping resistors and reduce noise overall.
Block Diagram
3
Pin Configuration
Q1
IN
5
Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q 10 O U TP U T (AVCM O S)
GND Q1 VDD Q2 GND Q3 VDD Q4 GND
VDD
4 ,8 1 5 ,2 0 IN 1
7
9
11
IN P U T (AVCM O S) 2 ,6 ,1 0 1 3 ,1 7
12
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VDD Q10 Q9 GND Q8 VDD Q7 GND Q6 Q5
14
20 pin SOIC/SSOP
GND
16
18
19
Pin Description
Pin Number 1 2,6,10,13,17 4,8,15,20 3,5,7,9,11,12,14,16,18,19 Cypress Semiconductor Corporation Document #: 38-07348 Rev. *A IN Pin Name Input Ground Power Supply Output · CA 95134 · 408-943-2600 Revised October 3, 2002 Description
GND VDD
Q1,Q2,Q3,Q4,Q5,Q6,Q7,Q8,Q9,Q10 · 3901 North First Street ·
San Jose
CY2CC910
COMLINKTM SERIES CY2CC910
Maximum Ratings[1]
Storage Temperature: ......... 65°C to +150°C Ambient Temperature:.. 40°C to +85°C Supply Voltage to Ground Potential VCC ......... 0.5V to 4.6V Input ........ 0.5V to 5.8V Supply Voltage to Ground Potential (Outputs only) .......... 0.5V to VDD + 1V DC Output Voltage... 0.5V to VDD + 1V Power Dissipation........ 0.75W
Variable Output Impedance Control (VOITM)
P ull Down
3 .5
Pull Up
3.5
3
3
2 .5
2.5
2
2
1 .5
1.5
1
1
0 .5
0.5
0 0 0 .0 1 0 .0 2 0 .0 3 0 .0 4 0 .0 5 0 .0 6 0 .0 7 0 .0 8 0 .0 9 0 .1
0 -0.18 -0.16 -0.14 -0.12 -0.1 -0.08 -0.06 -0.04 -0.02 0
Io l (A) Vdd = 3.3 V Vdd = 2.5 V Vdd = 1.8 V
Vdd = 3.3 V
I oh (A)
Vdd = 2.5 V Vdd = 1.8 V
Figure 1. Output Voltage vs. Output Current ( TA = 25°C)
DC Electrical Characteristics @ 3.3V (see Figure 2)
Parameter Description Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input High Current Input Low Current Input High Current Clamp Diode Voltage Continuous Clamp Current Power-down Disable Input Hysteresis Conditions VDD = Min., VIN = VIH or VIL VDD = Min., VIN = VIH or VIL Guaranteed Logic High Level Guaranteed Logic Low Level VDD = Max. VDD = Max. VDD = Max., VIN = VDD(Max.) VDD = Min., IIN = 18 mA VDD = Max., VOUT = GND VDD = GND, VOUT = < 4.5V 80 0.7 VIN = 2.7V VIN = 0.5V IOH = 12 mA IOL = 12 mA 2 Min. 2.3 Typ. 3.3 0.2 0.5 5.8 0.8 1 1 20 1.2 50 100 Max. Unit V V V V uA uA uA V mA uA mV
VOH VOL V IH V IL IIH IIL II V IK IOK OOFF VH
Note: 1. Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is intended to be a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Document #: 38-07348 Rev. *A
Page 2 of 8
COMLINKTM SERIES CY2CC910
DC Electrical Characteristics @ 2.5V (see Figure 2)
Parameter Description Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input High Current Input Low Current Input High Current Clamp Diode Voltage Continuous Clamp Current Power Down Disable Input Hysteresis Conditions VDD = Min., VIN = VIH or VIL VDD = Min., VIN = VIH or VIL Guaranteed Logic High Level Guaranteed Logic Low Level VDD = Max. VDD = Max. VDD = Max., VIN = VDD(Max.) VDD = Min., IIN = 18 mA VDD = Max., VOUT = GND VDD = GND, VOUT = < 4.5V 80 0.7 VIN = 2.4V VIN = 0.5V IOH = 7 mA IOH= 12 mA IOL = 12 mA 1.6 Min. 1.8 1.6 0.65 5.0 0.8 1 1 20 1.2 50 100 Typ. Max. Unit V V V V V uA uA uA V mA uA mV
VOH VOL V IH V IL IIH IIL II V IK IOK OOFF VH
DC Electrical Characteristics @ 1.8V (see Figure 6)
Parameter VDD VIH VIL VOH VOL Description Supply Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage IOH = 2 mA IOH = 2 mA Test Condition[2] Min. 1.71 0.65VDD[1.1] 0.3 VDD 0.45[1.2] 0.45 Max. 1.89 4 .3 0.35 VDD[0.6] Unit V V V V V
Capacitance
Parameter CIN COUT Description Input Capacitance Output Capacitance VIN = 0V VOUT = 0V Test Conditions Typ. 2.5 6.5 Max. Unit pF pF
Power Supply Characteristics (see Figure 2)
Parameter ICC ICCD Description Delta ICC Quiescent Power Supply Current Dynamic Power Supply Current Total Power Supply Current Test Conditions (IDD @ VDD = Max and VIN = VDD) (IDD @ VDD = Max and VIN = VDD 0.6V) VDD = Max Input toggling 50% Duty Cycle, Outputs Open VDD = Max Input toggling 50% Duty Cycle, Outputs Open fL = 40 MHZ Min. Typ Max 50 0.63 Unit uA mA/ MHz mA
IC
25
Note: 2. Test load conditions: 500-Ohm to ground with approximately 6-pF total loading and 200-MHz maximum frequency.
Document #: 38-07348 Rev. *A
Page 3 of 8
COMLINKTM SERIES CY2CC910
High Frequency Parametrics
Parameter DJ Description Jitter, Deterministic Test Conditions 50% duty cycle tW(5050) The "point to point load circuit" | Output Jitter Input Jitter | 50% duty cycle tW(5050) Standard Load Circuit. 50% duty cycle tW(5050) The "point to point load circuit" Fmax 2.5V Fmax 1.8V Fmax(20) Maximum frequency VDD = 2.5 V Maximum frequency VDD = 1.8V Maximum frequency VDD = 3.3 V Minimum pulse VDD = 3.3 V Minimum pulse VDD = 2.5 V Minimum pulse VDD = 1.8V See Figure 4 Min. Typ. Max. 20 Unit ps
Fmax 3.3V
Maximum frequency VDD = 3.3V
See Figure 2 See Figure 4
160 650 200 200 250
MHz
The "point to point load circuit" See Figure 4 VIN = 2.4V/0.0V VOUT = 1.7V/0.7V The "6-pF load circuit" VIN = 1.7/0.0V VOUT = 1.2V/0.4V See Figure 6
MHz MHz MHz
20% duty cycle tW(20-80) See Figure 5 The "point to point load circuit" VIN = 3.0V/0.0V VOUT = 2.3V/0.4V The "point to point load circuit" VIN = 3.0V/0.0V F= 100 MHz VOUT = 2.0V/0.8V The "point to point load circuit" VIN = 2.4V/0.0V F= 100 MHz VOUT = 1.7V/0.7V See Figure 4 1
tW 3.3V tW 2.5V tW 1.8V
ns
See Figure 4
1
The "6-pF load circuit" See Figure 6 VIN = 1.7V/0.0V VOUT = 1.2V/0.4V
1
AC Switching Characteristics @ 3.3V VDD = 3.3V ± 5%, Temperature = 40°C to +85°C
Parameter tPLH tPHL tR tF tSK(0) tSK(p) tSK(t) Propagation Delay Low to High Propagation Delay High to Low Output Rise Time Output Fall Time Output Skew: Skew between outputs of the same package (in phase). Pulse Skew: Skew between opposite transitions of the same output (tPHL tPLH). See Figure 10 See Figure 9 Description See Figure 3 Min. 1.5 1.5 Typ. 2 .7 2.7 0.8 0.8 0.2 0.2 0.4 Max. 3.5 3 .5 Unit nS nS V/nS V/nS nS nS nS
Package Skew: Skew b.etween outputs of different packages at See Figure 11 the same power supply voltage, temperature and package type.
AC Switching Characteristics @ 2.5V VDD = 2.5V ± 5%, Temperature = 40°C to +85°C
Parameter tPLH tPHL tR tF tSK(0) tSK(p) tSK(t) Propagation Delay Low to High Propagation Delay High to Low Output Rise Time Output Fall Time Output Skew: Skew between outputs of the same package (in phase). See Figure 10 Pulse Skew: Skew between opposite transitions of the same output (tPHL See Figure 9 tPLH). Package Skew: Skew between outputs of different packages at the same See Figure 11 power supply voltage, temperature and package type. Description See Figure 3 Min. Typ. Max. Unit 1.5 1.5 2.7 2.7 0.8 0.8 0.2 0.2 0.4 3 .5 3 .5 nS nS V/nS V/nS nS nS nS
Document #: 38-07348 Rev. *A
Page 4 of 8
COMLINKTM SERIES CY2CC910
AC Switching Characteristics @ 1.8V VDD = 1.8V ±5%, Temperature = 40°C to +85°C
Parameter tPLH tPHL tR tF tSK(0) tSK(p) tSK(t) Description Propagation Delay Low to High Propagation Delay High to Low Output Rise Time 20 80% Output Fall Time 20 80% Output Skew: Skew between outputs of the same package (in phase). Pulse Skew: Skew between opposite transitions of the same output (tPHL tPLH). Package Skew: Skew between outputs of different packages at the same power supply voltage, temperature and package type. Min. Typ. Max. Unit 1.5 2 .7 3.5 n S 1 .5 2.7 3 .5 nS 0 .2 1.5 n S 0 .2 1.5 n S See Figure 10 0.2 n S See Figure 9 0.2 n S See Figure 7 See Figure 11 0.4 nS
Parameter Measurement Information: VDD@3.3V2.5V
From Output Under Test CL = 50 pF 500 ohm
From Output Under Test CL = 3 pF 500 ohm
Figure 2. Load Circuit [3,4,5]
0.8VDD VDD/2 VDD/2
Figure 4. Point to Point Load Circuit[3,4,5]
tw(50-50) Input VDD/2 VDD/2 0V 0.8VDD
Input tPLH Output
VDD/2
0V tPHL
VDD/2
VOH VOL
Input
tw(20-80) VDD/2
0.8VDD
Figure 3. Voltage Waveforms Propagation Delay Times[6]
0V
Figure 5. Voltage WaveformsPulse Duration[4]
Parameter Measurement Information: VDD@1.8V
From Output Under Test CL = 6 pF 500 ohm
Input tw(50-50) 0.9V 0.9V 0V tw(20-80) 1.8V 0.9V 0V 1.8V
Figure 6. Load Circuit [3,4,5]
1.8V 0.9V 0.9V
Input
Figure 8. Voltage WaveformsPulse Duration[4]
Input tPLH
0.9V
0V tPHL
0.9V
VOH VOL
Output
Figure 7. Voltage Waveforms Propagation Delay Times[6]
Notes: 3. CL includes probe and jig capacitance. 4. All input pulses are supplied by generators having the following characteristics: PRR < 100 MHz, Z0 = 50, tR < 2.5 nS, tF < 2.5 nS. 5. The outputs are measured one at a time with one transition per measurement. 6. TPLH and TPHL are the same as tpd.
Document #: 38-07348 Rev. *A
Page 5 of 8
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