|
Details, datasheet, quote on part number:1505-75B
| |
Datasheet text preview:
1505
5-TAP SIP DELAY LINE T D/ T R = 3 (SERIES 1505)
FEATURES
· · · · · · 5 taps of equal delay increment Very narrow device (SIP package) Stackable for PC board economy Low profile Epoxy encapsulated Meets or exceeds MIL-D-23859C
data 3 ® delay devices, inc.
PACKAGES
1234567 1505-xxz xx = Delay (TD) z = Impedance Code
GND IN T1 T2 T3 T4 T5
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The 1505-series device is a fixed, single-input, five-output, passive delay IN Signal Input line. The signal input (IN) is reproduced at the outputs (T1-T5) in equal T1-T5 Tap Outputs increments. The delay from IN to T5 (TD) is given by the device dash GND Ground number. The characteristic impedance of the line is given by the letter code that follows the dash number (See Table). The rise time (TR) of the line is 33% of TD, and the 3dB bandwidth is given by 1.05 / TD.
SERIES SPECIFICATIONS
· · · · · Dielectric breakdown: Distortion @ output: Operating temperature: Storage temperature: Temperature coefficient: 50 Vdc 10% max. -55°C to +125°C -55°C to +125°C 100 PPM/°C
DASH NUMBER SPECIFICATIONS
Part Number 1505-5A 1505-10A 1505-20A 1505-30A 1505-40A 1505-50A 1505-60A 1505-70A 1505-80A 1505-90A 1505-100A 1505-5B 1505-10B 1505-20B 1505-30B 1505-40B 1505-50B 1505-60B 1505-75B 1505-100B 1505-30C 1505-50C 1505-60C 1505-100C 1505-50G 1505-100G 1505-200G 1505-300G TD ( ns) 5.0 ± 1.0 10.0 ± 1.0 20.0 ± 1.5 30.0 ± 2.0 40.0 ± 2.5 50.0 ± 3.0 60.0 ± 3.0 70.0 ± 3.5 80.0 ± 4.0 90.0 ± 5.0 100 ± 5.0 5.0 ± 1.0 10.0 ± 1.0 20.0 ± 1.5 30.0 ± 2.0 40.0 ± 2.5 50.0 ± 3.0 60.0 ± 3.0 75.0 ± 3.5 100 ± 5.0 30.0 ± 2.0 50.0 ± 3.0 60.0 ± 3.0 100 ± 5.0 50.0 ± 3.0 100 ± 5.0 200 ± 10.0 300 ± 15.0 Delay per Tap (ns) 1.0 ± 0.3 2.0 ± 0.4 4.0 ± 0.6 6.0 ± 1.0 8.0 ± 1.5 10.0 ± 1.8 12.0 ± 2.0 14.0 ± 2.0 16.0 ± 2.0 18.0 ± 3.0 20.0 ± 3.0 1.0 ± 0.3 2.0 ± 0.4 4.0 ± 0.6 6.0 ± 1.0 8.0 ± 1.5 10.0 ± 1.8 12.0 ± 2.0 15.0 ± 2.0 20.0 ± 3.0 6.0 ± 1.0 10.0 ± 1.8 12.0 ± 2.0 20.0 ± 3.0 10.0 ± 1.8 20.0 ± 3.0 40.0 ± 6.0 60.0 ± 8.0 TR ( ns) 2.0 3.0 6.0 9.0 12.0 15.0 18.0 21.0 24.0 27.0 30.0 2.0 3.0 6.0 9.0 12.0 15.0 18.0 24.0 30.0 9.0 15.0 18.0 30.0 15.0 30.0 60.0 90.0 Impedance ( ) 50 50 50 50 50 50 50 50 50 50 50 100 100 100 100 100 100 100 100 100 200 200 200 200 500 500 500 500 RD C ( ) 0.6 0.6 0.7 0.7 0.9 1.0 1.2 1.4 1.6 1.8 2.0 0.7 0.7 1.0 1.5 1.8 2.0 2.0 2.5 2.5 2.5 3.0 3.5 6.0 5.0 15.0 21.0 29.0
T1 T2 T3 T4
IN GND
T5
Functional Diagram
.200 MAX.
1
2
3
4
5
6
7
.800 MAX. .020 TYP.
.250 MAX.
.020 TYP. .600 TYP.
.100 TYP.
.100 MIN. .010 TYP.
Package Dimensions
©1997 Data Delay Devices
Doc #97024
2/6/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
1505
PASSIVE DELAY LINE TEST SPECIFICATIONS
TEST CONDITIONS
25oC ± 3oC High = 3.0V typical Low = 0.0V typical Source Impedance: 50 Max. Rise/Fall Time: 3.0 ns Max. (measured at 10% and 90% levels) Pulse Width (TD 75ns): PWIN = 2 x TD Period (TD > 75ns): PERIN = 10 x TD INPUT: Ambient Temperature: Input Pulse: OUTPUT: Rload: Cload: Threshold: 10M 10pf 50% (Rising & Falling)
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
PERIN PWIN T RISE INPUT SIGNAL
90% 50% 10%
T FALL VIH
90% 50% 10%
VIL T FALL
T RISE T RISE OUTPUT SIGNAL
90% 50% 10%
T FALL VOH
90% 50% 10%
VOL
Timing Diagram For Testing
OUT PULSE GENERATOR TRIG
RIN
IN DEVICE UNDER TEST (DUT)
50
T1 T2 T3 T4 T5
IN TRIG OSCILLOSCOPE
RIN = ROUT = ZLINE
ROUT
Test Setup
Doc #97024
2/6/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
2
|
|
