|Category||Logic => Delay Lines|
|Description||Fixed Passive Sip Delay Line|
|Company||Data Delay Devices, Inc.|
|Datasheet||Download 2020 datasheet
Microstrip Technology Fast rise time for high frequency applications Delay available from to 2500ps Very narrow device (SIP package) Stackable for PC board economy Epoxy encapsulated Meets or exceeds 2 3
The 2020- and 2021-series devices are fixed, single-input, single-output, passive delay lines. The signal input (IN) is reproduced at the output (OUT), shifted by a time (TD) given by the device dash number. The characteristic impedance of the lines is nominally 50 ohms. The rise time (TR) of the lines is no more than 1ns, resulting a 3dB bandwidth of at least 350MHz.
Tolerance: Bandwidth: Ripple in pass-band: Dielectric breakdown: Operating temperature: Temperature coefficient:
INPUT: Ambient Temperature: Source Amplitude: Source Impedance: Input Frequency: 25 0dBm typical 50 nominal 27.777778MHz
Network analyzer is used in phase measurement mode, normalized with a wire jumper between input and output of DUT test socket. Delay is related to phase lag with proportionality constant of 100ps/deg. NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
50-OHM SIGNAL DIVIDER OUT R (HP 35676 -66301) OUT A OUT B 50-Ohm Coax IN GND DEVICE UNDER TEST (DUT) 50-Ohm Coax OUT GND
|Related products with the same datasheet|
|Some Part number from the same manufacture Data Delay Devices, Inc.|
|2020-100 Fixed Passive Sip Delay Line|
|2075 Fixed Passive Delay Line With BNC Connectors|
|2211 Fixed Dip Delay Line|
|2214 20-tap Dip Delay Line|
1507-20B : 10-tap Sip Delay Line
1513-70A : Fixed Sip Delay Line
DDU66C-175D4 : 5-tap, Hcmos-interfaced Fixed Delay Line
DDU8C3-XX : Fixed 5-tap Lvcmos Delay Line
PDU108H-8 : 3-bit, Ecl-interfaced Programmable Delay Line Series
PPG33F-.5 : 3-bit Programmable Pulse Generator
DDU11H-20C3 : 5-tap, Ecl-interfaced Fixed Delay LINE (series Ddu11h)
1518-15-80T2 : 5-tap SMD Delay LINE
1516SA050101 : PASSIVE DELAY LINE, TRUE OUTPUT, DSO8 Specifications: Delay Line Type: PASSIVE DELAY LINE ; Package Type: Surface Mount, SMD-8 ; Time Delay: 5 ns
1520A181101A : PASSIVE DELAY LINE, TRUE OUTPUT, DIP14 Specifications: Delay Line Type: PASSIVE DELAY LINE ; Package Type: DIP-14 ; Time Delay: 180 ns
5353-1000 : CONTINUOUS TIME FILTER, BUTTERWORTH, HIGHPASS, PDIP16 Specifications: Filter Class: Continuous ; Filter Characteristic: Butterworth ; Supply Voltage (VS): 9 to 18 volts ; Fc: 0.0100 kHz ; Operating Temperature: 0.0 to 70 C (32 to 158 F) ; Package Type: DIP-16 ; Number of Pins: 16 ; Number of Devices: 1 ; Applications: General
74AC11258N : Multiplexers. ti 74AC11258, Quad 2-Line to 1-Line Data Selectors/multiplexers With 3-State Outputs.
74ACT273 : CMOS/BiCMOS->AC/ACT Family->Advanced High Speed CM. Octal D-type Flip Flop With Clear.
AVGDV4015BN : Dual 4 Bit Shift Registers, Plastic Dip, Through Hole.
FST16210 : Bus Oriented Circuits. 20-Bit Bus Switch. The Fairchild Switch FST16210 provides 20-Bits of highspeed CMOS TTL-compatible bus switching. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. The device is organized or 20-Bit bus switch. When OE1 is LOW, the switch is ON and Port 1A is connected.
HD14163B : The Hd14160b to Hd14163b Are Synchronous Programmable Counters And Functionally Equivalent to The 74160 to 74163 TTL Counters..
MACH111-12 : High-performance ee CMOS Programmable Logic. x 44 Pins in PLCC and TQFP x 32 Macrocells 5 ns tPD Commercial, 7.5 ns tPD Industrial x 182 MHz fCNT x 32 I/Os; 4 dedicated inputs/clocks; 2 dedicated inputs 32 Flip-flops; 4 clock choices 2 "PALCE26V16" blocks SpeedLockingTM for guaranteed fixed timing Bus-FriendlyTM Inputs and I/Os Peripheral Component Interconnect (PCI) compliant (-5/-7/-10/-12).
MM74HC240 : CMOS/BiCMOS->HC/HCT Family. Inverting Octal 3-STATE Buffer. The MM74HC240 3-STATE buffer utilizes advanced silicon-gate CMOS technology. It possesses high drive current outputs which enable high speed operation even when driving large bus capacitances. These circuits achieve speeds comparable to low power Schottky devices, while retaining the advantage of CMOS circuitry, i.e., high noise immunity and low power.
N74F845N : Bus Interface Latches. 74F841/74F842 10-bit bus interface latches, non-inverting/inverting 74F843 9-bit bus interface latch, non-inverting 74F845/74F846 8-bit bus interface latches, non-inverting/inverting (3-State) High speed parallel latches Extra data width for wide address/data paths or buses carrying The 74F84174F846 bus interface latch series are designed to provide.
NC7NZU04K8X : Tinylogic Uhs Unbuffered Inverter. The is a triple unbuffered inverter from Fairchild's Ultra High Speed Series of TinyLogic. The special purpose unbuffered circuit design is primarily intended for crystal oscillator or analog applications. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation.
SL74HC299 : 8-bit Bidirectional Universal Shift Register With Parallel I/o. 8-Bit Bidirectional Universal Shift Register with Parallel I/O The SL74HC299 is identical in pinout to the LS/ALS299. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The SL74HC299 a multiplexed parallel input/output data port to achieve full 8-bit handling a 20 pin package.
SN5492AJ : ti SN5492A, Divide-by-twelve Counter. PRODUCTION DATA information is current as of publication date. Products conform to s per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. .
SN74125 : Bipolar->TTL Family. Quadruple Bus Buffer With 3-state Outputs. Quad Bus Buffers 3-State Outputs Separate Control for Each Channel These bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors.
SN7423 : Dual 4-input NOR GATEs With Strobe.
SN74ACT32 : CMOS/BiCMOS->AC/ACT Family. Quad 2-input Positive-OR GATE. The 'ACT32 devices are quadruple 2-input positive-OR gates. The devices perform the Boolean function B in positive logic. ORDERING INFORMATION TA PDIP N SOIC 85°C 40 SOP NS SSOP DB TSSOP PW CDIP to 125°C CFP W PACKAGE Tube Tape and reel Tape and reel Tape and reel Tape and reel Tube ORDERABLE PART NUMBER SNJ54ACT32J SNJ54ACT32W TOP-SIDE MARKING.
SN74ALS138AD : Decoders. ti SN74ALS138A, 3-Line to 8-Line Decoders/demultiplexers. Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporate Three Enable Inputs to Simplify Cascading and /or Data Reception Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs The ALS138A and AS138 are to 8-line decoders/demultiplexers.
SN74F158AD : Multiplexers. ti SN74F158A, Quadruple 2-Line to 1-Line Data Selectors/multiplexers.
SN74TVC3010 : 10-bit Voltage Clamp. Designed to be Used in Voltage-Limiting Applications 6.5- On-State Connection Between Ports A and B Flow-Through Pinout for Ease of Printed Circuit Board Trace Routing Direct Interface With GTL+ Levels The SN74TVC3010 provides 11 parallel NMOS pass transistors with a common gate. The low on-state resistance of the switch allows connections to be made.
TC7MZ374FK : LCX Equivalent. Function = Low Voltage Octal D-type Flip-flop With 5 V Tolerant Inputs And Outputs ;; = Low: VCC = 2.0~3.6 V High: TPD = 8.5 NS (max) (VCC = 3.0~3.6 V).
933372660653 : 4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14. s: Flip-Flop Type: D ; Triggering: Positive-edge Triggered ; Supply Voltage: 5V ; Output Characteristics: Complementary Output ; Propagation Delay: 220 ns ; fMAX: 20 MHz ; Package Type: PLASTIC, SOT-108, SO-14 ; Number of Pins: 14.