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Details, datasheet, quote on part number:PPG312F-400MC5
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Datasheet text preview:
PPG312F
12-BIT PROGRAMMABLE PULSE GENERATOR (SERIES PPG312F)
FEATURES
· · · · · · · · ·
TRIG 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VCC N/C OUT OUT/ N/C RES N/C N/C VCC A0 A1 A2 N/C N/C N/C N/C N/C A4 N/C VCC
data 3 ® delay devices, inc.
PACKAGES
N/C N/C N/C N/C N/C N/C GND N/C N/C GND A3 A5 A6 A7 GND A8 A9 A10 A11
Digitally programmable in 4096 steps Monotonic pulse-width-vs-address variation Rising edge triggered Two separate outputs: inverting & non-inverting Precise and stable pulse width Input & outputs fully TTL interfaced & buffered 10 T2L fan-out capability Fits standard 40-pin DIP socket Auto-insertable
PPG312F-xx DIP PPG312F-xxC5 Gull-Wing PPG312F-xxM Military DIP PPG312F-xxMC5 Military Gull-Wing
FUNCTIONAL DESCRIPTION
The PPG312F-series device is a 12-bit digitally programmable pulse generator. The width, PWA, depends on the address code (A11-A0) according to the following formula: PWA = PW0 + TINC * A
PIN DESCRIPTIONS
TRIG Trigger Input OUT Non-inverted Output OUT/ Inverted Output A0-A11 Address Bits RES Reset VCC +5 Volts GND Ground
where A is the address code, TINC is the incremental pulse width of the device, and PW0 is the inherent pulse width of the device. The incremental width is specified by the dash number of the device and can range from 0.5ns through 400ns, inclusively. RESET is held LOW during normal operation. When it is brought HIGH, OUT and OUT/ are forced into LOW and HIGH states, respectively, and the unit is ready for the next trigger input. The address is not latched and must remain asserted while the output pulse is active.
SERIES SPECIFICATIONS
· · · · · · Programmed pulse width tolerance: 5% or 2ns, whichever is greater Inherent width (PW0): 20ns typical Inherent delay (TTO): 10ns ± 2ns Operating temperature: 0° to 70° C Supply voltage VCC: 5VDC ± 5% Supply current: ICC = 200ma typical
DASH NUMBER SPECIFICATIONS
Part Number PPG312F-.5 PPG312F-1 PPG312F-2 PPG312F-5 PPG312F-10 PPG312F-20 PPG312F-50 PPG312F-100 PPG312F-200 PPG312F-400 Incremental Width Per Step (ns) .5 ± .3 1 ± .5 2 ± .5 5 ± 1.5 10 ± 2.0 20 ± 2.0 50 ± 2.5 100 ± 5.0 200 ± 10.0 400 ± 20.0 Total Width Change (us) 2.048 ± 0.10 4.096 ± 0.20 8.192 ± 0.41 20.48 ± 1.02 40.96 ± 2.05 81.92 ± 4.10 204.8 ± 10.2 409.6 ± 20.5 819.2 ± 41.0 1,638.4 ± 81.9
NOTE: Any dash number between .5 and 400 not shown is also available. ©1997 Data Delay Devices
Doc #97008
1/15/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
PPG312F
APPLICATION NOTES
DEVICE TIMING
The timing definitions and restrictions for the PPG312F are shown in Figure 1. The unit is activated by a rising edge on the TRIG input. After a time, TTO (called the inherent delay), the rising edge of the pulse appears at OUT. The duration of the pulse is given by the above equation. For the duration of the pulse, the device ignores subsequent triggers. Once the falling edge of the pulse has appeared at OUT, an additional time, TOTR, is required before the device can respond to the next trigger. At power-up, the state of the PPG312F is unknown. Consequently, after power is applied, the unit may not respond to input triggers for a time equal to the maximum pulse width, PWT. After this time, the unit will function properly. If your application requires that the device function immediately, issue a quick reset at power-up.
POWER SUPPLY BYPASSING
The PPG312F relies on a stable power supply to produce repeatable pulses within the stated tolerances. A 0.1uf capacitor from VCC to GND, located as close as possible to each VCC pin, is recommended. A wide VCC trace should connect all VCC pins externally, and a clean ground plane should be used.
INCREMENT TOLERANCES
Please note that the increment tolerances listed represent a design goal. Although most increments will fall within tolerance, they are not guaranteed throughout the address range of the unit. Monotonicity is, however, guaranteed over all addresses.
` 11-A0 A
Ai TR W TOAX TATS
Ai+1
RES TRTS TRIG TTO OUT TS K E W OUT/ Figure 1: Timing Diagram T RO TOTR PWA TT W
Doc #97008
1/15/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
2
PPG312F
DEVICE SPECIFICATIONS
TABLE 1: AC CHARACTERISTICS
PARAMETER Total Programmable Pulse Width Inherent Pulse Width Trigger to Output Delay Reset to Output Delay Output Skew Trigger Pulse Width Reset Pulse Width Reset to Trigger Setup Time Address to Trigger Setup Time Output Low to Address Change Output to Trigger Recovery Time SYMBOL PWT PW0 TTO T RO TS K E W TT W TR W TRTS TATS TOAX TOTR MIN 15.0 8.0 TYP 4095 20.0 10.0 1.5 5.0 10.0 9.0 6.0 0.0 10.0 MAX 27.0 12.0 17.0 UNITS T INC ns ns ns ns ns ns ns ns ns ns
TABLE 2: ABSOLUTE MAXIMUM RATINGS
PARAMETER DC Supply Voltage Input Pin Voltage Storage Temperature Lead Temperature SYMBOL VCC VIN TSTRG T LEAD MIN -0.3 -0.3 -55 MAX 7.0 VDD+0.3 150 300 UNITS V V C C NOTES
10 sec
TABLE 3: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V) PARAMETER High Level Output Voltage Low Level Output Voltage High Level Output Current Low Level Output Current High Level Input Voltage Low Level Input Voltage Input Clamp Voltage Input Current at Maximum Input Voltage High Level Input Current Low Level Input Current Short-circuit Output Current Output High Fan-out Output Low Fan-out SYMBOL VOH VOL IOH IOL VIH VIL VIK IIHH IIH I IL IOS MIN 2.5 TYP 3.4 0.35 MAX UNITS V V mA mA V V V mA µA mA mA Unit Load NOTES VCC = MIN, IOH = MAX VIH = MIN, VIL = MAX VCC = MIN, IOL = MAX VIH = MIN, VIL = MAX
0.5 -1.0 20.0
2.0 0.8 -1.2 0.1 20 -0.6 -150 25 12.5
VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX
-60
Doc #97008
1/15/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
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