Digchip : Database on electronics components
Electronic components database
Search:                      In section:
Member, Distributor  
Log In
Email:
Password:

Details, datasheet, quote on part number:PC-414COM1
 
 
Part:PC-414COM1
Category:Others => Boards->Data Acquisition
Description:
Company:Datel, Inc.
Datasheet:Download PC-414COM1 datasheet   File size : 95 kB
Request For quote:  Find where to buy PC-414COM1
 



Datasheet text preview:
®
®
PC-414COM
DSP COMM Port Adapter A/D Interface
FEATURES
· Adds a powerful A/D "front end" to DSP Array Processor boards · Up to 14MHz transfer rate (7 megasamples/second) without loading host ISA bus · Up to 10MHz A/D sample rates · Mounts directly on DATEL's PC-414 A/D board · Pin-compatible with TI's 320C40 COMM ports · Offers full range of A/D options A significant limitation to high-speed analog-to-digital (A/D) conver ter performance on PC-compatible analog input boards is the slow speed of the host ISA (Industry Standard Architecture) bus. The PC-414COM adapter module avoids these bus delays by sending A/D data directly from a host DATEL PC-414 A/D board to an adjacent third party Digital Signal Processor (DSP) board. The adapter connects to Texas Instruments 320C40 series DSP's using the "COMM" port digital interface. The COMM port is a fast, byte-wide port with transfer rates up to 7 million samples per second on the PC-414COM. The host PC-414 can collect data to its local FIFO memory at A/D sampling rates up to 10MHz and includes a sample counter for repeated frames of specified size. Or the system can run "forever" with non-stop streaming A/D conversion. For A/D sampling rates above about 7MHz, the PC-414 must briefly stop periodically to allow the DSP to collect data. The adapter is normally offered as an integrated set with its PC-414 A/D carrier board and is ordered together under a common model number. Existing PC-414's in the field may be modified by DATEL to accept the adapter. Typical applications include all high-speed DSP A/D conversion such as FFT's (Fast Fourier Transforms), sonar, digital filters, custom test systems, ultrasonics, high-speed control loops, spectrometers, simulators, imaging, and speech processing. The COMM port interface also has a more
powerful, subtle speed advantage for the DSP programmer. Instead of having to retrieve the analog data from some slow external bus interface, the A/D data is already "inside the DSP" and can be used immediately or allowed to accumulate in the PC-414 FIFO (First In, First Out) memory for a short time. This non-bus high-speed transfer has a significant advantage for Windows® applications. The PC-414COM is a 3.5-inch by 4.375-inch daughter card which mounts on the host PC-414 A/D board via corner standoffs. The internal system consists of programmable logic configured as a state machine controller. The integrated set of boards occupy one slot width in the host PC. The adapter takes A/D data from the PC-414's 16-bit parallel data port and reformats it for transmission through the byte-wide COMM port to the DSP. The adapter also connects to the PC-414 parallel digital I/O port for several control signals. These appear as I/O bits on the ISA bus. Please refer to the PC-414 Data Sheet, software diskettes, and User Manuals for full information on this board.
P2
Programming Port P4 Mode Control 40MHz Oscillator DSP COMM Port Header Connector
PC-414 Digital I/O Port P5 PC-414 Parallel A/D Data Inport P3
RST, HF* +5V
Word to Byte Formatter 16 data XCLK EF*
Handshake Logic (Alternate Pinout)
State Machine Controller
8 data CSTRB* CRDY* CREQ* CACK*
P1
Figure 1. Functional Block Diagram
DATEL, Inc., Mansfield, MA 02048 (USA) · Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 · Email: sales@datel.com · Internet: www.datel.com
105
®
®
PC-414COM
SPECIFICATIONS
(Typical at +25°C under dynamic conditions unless noted) Function Unidirectional asynchronous digital data interface between a DATEL PC-414 data acquistion board parallel data port and a type "I" (input) 320C40 DSP "COMM" por t. The COMM port is the receiver and the PC-414 interface adapter is the transmitter. The purpose is very high speed A/D data transfers which are not slowed down by the ISA bus. 8 (one COMM port) 14 Megabytes per second (7 megasamples/sec) typical within a 4-byte burst. The PC-414 COMM port adapter is permanently assigned as a type "O" (output) and will not respond to direction changes. The COMM adapter includes power up "token forcer circuits" per TI's suggestions. Data is digitally multiplexed as groups of 4 bytes containing two 12 to 16-bit A/D samples per 32bit longword. The Least Signficant Byte is sent first. One full longword (4 bytes, two A/D samples) is always sent once the first byte is started. See note 1. Uses standard 320C40 CSTRB*/ CRDY* handshake protocol as specified in the Texas Instruments documentation. The byte transfers use the following mode: The CSTRB* output will remain inhibited until the PC-414 A/D FIFO memory is half full or greater. At FIFO half full, the COMM port interface will send four bytes (two A/D samples) to the DSP receiver using normal CSTRB*/CRDY* handshaking then will inhibit CSTRB* until FIFO half full occurs again. If the FIFO is continuously half full or greater, the interface will send data as long as the DSP accepts it. See Note 2. Logic Controls The COMM port will inhibit data transfers when the PC-414 A/D data FIFO is empty. This is controlled from an output bit on the PC-414 digital I/O port or from P1-29. See Note 3. Data Overflow Mounting Method The COMM port adapter is a small daughter PC board attached to the PC-414 using existing standoff mounting holes already on the PC-414. The COMM port adapter attaches to both the existing parallel data port and the digital I/O port. One existing connector (P4 on the PC-414 - the older parallel data port) must be removed to fit the PC-414COM adapter. 3.5 inches x 4.375 inches +5Vdc power at 500mA max is supplied from the PC-414 digital I/O port (not from the parallel data por t). Dual row right angle flat cable male header, InterCon Systems type 5654-015, 30 pins (2 x 15), mounted beneath the adapter PC board to avoid using more than one PC slot. The COMM port PC board is also pinned out in parallel to an AMP P/N 104069-5 or a Samtech TMS-1-10-01-T-D-RA. When mounted in the host PC, the COMM port connector faces up (i.e., away from the PC's motherboard) . One PC slot (PC-414 plus COMM por t adapter). The COMM port interface assumes a receiving 320C40 board in an adjacent host PC slot. The flat cable length for maximum speed is 6 inches or less. Greater length may degrade the speed and/or fail to function. Standard status register and/or ISA bus interrupt signals are available on the PC-414 carrier board to indicate FIFO overflow (lost data). 4096 samples
Outline Dimensions Power Required
Number of Data Bits Data Rate
COMM Port Connector
Token Assignment
Data Format
Number of Slots Flat Cable Length
Data Flow Control
PC-414 FIFO Size
State Machine Reset
Notes 1. Both CREQ* and CACK* have internal terminations as shown and are used by the token forcer circuits. The PC-414COM adapter is always the token owner. 2. In operation, the A/D FIFO will always store the last half FIFO's worth of data. The DSP can always get as much data as it needs as long as the A/D continues sampling. If A/D sampling stops, the last half FIFO may be read from the ISA bus. In addition, the DSP can ignore the COMM port interface by not responding with CRDY* even if the A/D continues r unning. 3. A CAUXRES* input is not provided to the PC-414 COMM por t interface. This control normally resets the PC-414 and the COMM port interface. However these functions are available from the ISA bus register controls.
DATEL, Inc., Mansfield, MA 02048 (USA) · Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 · Email: sales@datel.com · Internet: www.datel.com
106
®
®
PC-414COM
Applications Since the PC-414COM adapter is downstream from the PC-414's FIFO on-board memory, the system can collect data non-stop continuously to the DSP at high speed with no lost samples. The architecture differs significantly from competitive designs. Also the full range of triggering, sample clocking, and channel addressing is available from the host PC-414. These functions are controlled from the ISA bus and are normally set up only once at the beginning of the A/D session. The DSP array processor board is typically placed in an adjacent or nearby ISA slot with a short flat cable and connector assembly. Refer to the specifications for details. Formatting and Handshaking The PC-414COM adapter accepts two 12, 14, or 16-bit A/D words and reformats them as four bytes to be sent across the COMM port interface. The on-board logic handshakes with the COMM port protocol and will automatically attempt to send bytes if the adapter is ready. As long as the DSP responds to CSTRB* outputs from the adapter with CRDY* handshakes, data will be sent to the COMM port. Since the DSP completely controls this handshaking, the DSP can accept data at the rate and amount that it needs. Any data which is not immediately used will accumulate in the PC-414 FIFO and will not be lost as long as it is read before the FIFO overflows. The DSP can read a longword at a time or initiate a burst. Two A/D words are always formatted as four bytes for compatibility with the 32-bit longword architecture of the COMM port. The PC-414COM port is permanently assigned as a type "O" (output) COMM port and will ignore change of direction or token passing requests. The receiver DSP board must be a type "I" input. The PC-414COM includes a token forcer circuit to initialize the C40 to an "I" input. A FIFO overflow condition sets an ISA bus maskable interrupt or status flag. Full ISA bus controls can inhibit the A/D at any time, reset the FIFO and start again. In addition, the OUT0 parallel port bit (P5-20) will clear the state machine controller when low. The DSP receiver can program the COMM port in DMA or program transfer mode. The Last Block of Samples Since the controller inhibits transfers below FIFO half full, the very last group of samples, after the A/D has permanently stopped, may be read from the FIFO using the ISA bus (after switching PC-414 Command Register bit 6 to ZERO). The PC-414COM works well with signal streaming where the A/D either runs continuously or at regular on/off periods in counted blocks. These applications usually have a bandwidth problem and therefore need a high speed COMM port interface. For lower speed applications or ones with very short A/D sequences, these will not activate the COMM port interface until the A/D FIFO is at least half full (2049 samples). Thus there will be an initial delay at first before data reaches the DSP. And samples will be left in the FIFO at the end of the session. The beginning delay is primarily a data skewing issue, taken care of by properly indexing the data. The data which is still in the FIFO after A/D sampling stops must be removed by ISA bus access. Or leave the A/D running long enough to deliver all needed data then discard the last half FIFO. Data Format and Channel Synchronization Data is delivered to the COMM port in whatever format was selected on the PC-414. Each A/D sample is right justified and may be sign-extended on the PC-414. For multi-channel data, the channel ordering is multiplexed with a typical 4-channel data stream having the channel sequence: 0, 1, 2, 3, 0, 1, . . . indefinitely. Therefore data must be demultiplexed ("unraveled") on the DSP side. For highest speed, there is no channel address tagging to add overhead to the data stream, so DSP software must not get out of sequence. Some applications assign an unused analog channel to a known DC voltage for positive channel synchronization. Also, the PC-414 can use counted frames with an ISA I/O port status indication and optional interrupt when a frame is complete. Channel addressing always starts on channel zero for the beginning of a frame therefore a reliable counting algorithm will fully recover all channels. Since the trigger frame timing, sample counter and FIFO flags on the PC-414 are all independent, users should either fully empty the FIFO after each frame (using the empty bit to verify) or reset the FIFO or make absolutely sure your counting function does not lose channel synchronization. Other applications may detect excessive intersample differences to flag discontinuities as an indication of lost samples.
Start Collect A/D data to FIFO Yes DSP needs more data? No Exit Yes Assert CSTRB*
No
FIFO >half full?
No CRDY* asserted? Repeat four times (one longword)
Yes Transfer 1 byte. Deassert CSTRB*
Note - A/D sampling continues non-stop during COMM port transfers
Figure 2. PC-414COM Flow Diagram
DATEL, Inc., Mansfield, MA 02048 (USA) · Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 · Email: sales@datel.com · Internet: www.datel.com
107