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Part: EL2004

Category:
 Multimedia
   -> Video
     -> Drivers/Buffers

Description: 350 MHZ Fet Buffer 94 Databook

Company: Elantec Semiconductor, Inc. (acquired by Intersil)

Datasheet: Download EL2004 datasheet     File size : 338 kB

Request For quote: Find where to buy EL2004



Datasheet text preview:
EL2004 EL2004C

EL2004 EL2004C
350 MHz FET Buffer
Features
Slew rate 2500 V ms Rise time 1 ns Bandwidth 350 MHz ELH0033 pin compatible g 5 to g 15V operation 100 mA output current MIL-STD-883B Rev C devices A anufactured in U S A m

General Description
The EL2004 is a very high-speed FET input buffer line driver designed for unity gain applications at both high current (up to 100 mA) and at frequencies up to 350 MHz The 2500 V ms slew rate and wide bandwidth ensures the stability of the circuit A when the EL2004 is used inside op amp feedback loops wpplications for the EL2004 include line drivers video buffers ideband instrumentation and high-speed drivers for inductive and capacitive loads The performance of the EL2004 makes it an ideal buffer for video applications including input buffers for flash A D converters and output buffers for video DACs Its excellent phase linearity is particularly advantageous in digital E signal processing applications lantec facilities comply with MIL-I-45208A and are MILSTD-1772 certified Elantec's Military devices comply with MIL-STD-883B Revision C and are manufactured in our rigidly controlled ultra-clean facilities in Milpitas California For additional information on Elantec's Quality and Reliability AssurS ance Policy and procedures request brochure QRA-1

pplications
Coaxial cable driver Fast op amp booster Flash converter driver Video line driver High-speed sample and hold Pulse transformer driver A T E pin driver

Ordering Information
E Part No

Temp Range
b 25 b 55 b 55

Package Outline TO-8 TO-8 MDP0002 MDP0002

implified Schematic

L2004CG EL2004G EL2004L

C to a 85 C C to a 125 C

C to a 125 C 52-Pad LCC MDP0013

EL2004L MIL b 55 C to a 125 C 52-Pad LCC MDP0013

C 5962-89659 is the SMD version of this device

onnection Diagram
Case is Electrically Isolated

November 1993 Rev G

2004 ­ 1

Top View
2004 ­ 3

Note All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication however this data sheet cannot be a ``controlled document'' Current revisions if any to these spe1ifications are maintained at the factory and are available upon your request We recommend checking the revision level before finalization of your design documentation Patent pending c

989 Elantec Inc

EL2004 EL2004C
350 MHz FET Buffer
Absolute Maximum Ratings (TA e 25 C)
VS VIN PD IOC IOP Supply Voltage (V a b Vb) Input Voltage Power Dissipation (See curves) Continuous Output Current Peak Output Current 40V 40V 1 5W g 100 mA g 250 mA TA Operating Temperature Range EL2004 EL2004C Operating Junction Temperature Storage Temperature Lead Temperature (Soldering 10 seconds)
b 55 C to a 125 b 25 C to a 85

TJ TST

C C 175 C b 65 C to a 150 C
300 C

A Important Note ll parameters having Min Max specifications are guaranteed The Test Level column indicates the specific device testing actually performed during production and Quality inspection Elantec performs most electrical tests using modern high-speed automatic test equipment specifically the LTX77 Series system Unless otherwise noted all tests are pulsed tests therefore TJ e TC e TA T est Level I I I I III V V g Test Procedure 100% production tested and QA sample tested per QA test plan QCX0002 100% production tested at TA e 25 C and QA sample tested at TA e 25 C T MAX and TMIN per QA test plan QCX0002 QA sample tested per QA test plan QCX0002 Parameter is guaranteed (but not tested) by Design and Characterization Data Parameter is typical value at TA e 25 C for information purposes only

15V DC Electrical Characteristics
VS e g 15V TMIN k TA k TMAX VIN e 0V RL e 1 kX unless otherwise specified (Note 1) EL2004 Parameter Description Test Conditions Min VOS Output Offset Voltage Voltage Gain RS s 100 kX TJ e 25 C RS s 100 kX VIN e g 10V RL e 100X VIN e g 10V RIN ROUT VO Input Impedance Output Impedance Output Voltage Swing TJ e 25 C VIN e g 1V VIN e g 1 VDC DRL e 100X to Infinity VIN e g 14V VIN e g 10 5V RL e 100X TA e 25 C TJ e 25 C (Note 2) TA e 25
g 12 g9

EL2004C Test Level I I I I I 0 96 0 90 108 0 98 0 95 1011 4
g 12 g9 g 13 g9 8

Typ 5

Max 10 15

Min

Typ 12

Max 20 25 10 0 98

Test Level I III II II I

Units

mV mV VV VV X X V V nA nA TD is 3 2in nA nA mA

AV

0 97 0 92 108

0 98 0 95 1011 4
g 13 g9 8

10 0 98

8

I I I

10

II II I

IIN

Input Current

0 25 25 10 20 20 24

I IV I V I 20 20

20 20 50

I IV III V

C (Note 3)

TJ e TA e TMAX VIN e b10V IS Supply Current

24

II

2

EL2004 EL2004C
350 MHz FET Buffer
g 5V DC Electrical Characteristics
VS e g 5V TMIN k TA k TMAX VIN e 0V RL e 50X unless otherwise specified EL2004 Parameter Description Test Conditions Min VOS Output Offset Voltage Voltage Gain RS s 100 kX TJ e 25 C RS s 100 kX VIN e g 1V RL e 1 kX VIN e g 1V RIN ROUT VO IIN Input Impedance Output Impedance Output Voltage Swing Input Current TJ e 25 C VIN e g 1V VIN e g 1 VDC DRL e 50X to Infinity VIN e g 4V TJ e 25 C (Note 2) TA e 25 C (Note 3) TJ e TA e TMAX PSRR IS Power Supply Rejection Ratio Supply Current VS e g 5V to g 15V RL e 1 kX RL e 1 kX 60 17 5 20
g2 0

EL2004C Test Level I I I I I 0 90 0 80 1010 0 95 0 88 1011 4
g2 0 g2 9

Typ 10

Max 30 35

Min

Typ 10

Max 30 35 10 0 95

Test Level I III II II I

Units

mV mV VV VV X X V pA nA nA dB mA TD is 3 2in TD is 1 3in

AV

0 90 0 80 108

0 95 0 88 1011 4

10 0 95

8

I I

10

II III

g2 9

250 25 10

I IV I V I 60 17 5

500 5 20

I IV III V

20

II

Note 1 When operating at elevated temperatures the power dissipation of the EL2004 must be limited to the values shown in the typical performance curve ``Maximum Power Dissipation vs Temperature'' Junction to case thermal resistance is 31 C W when dissipation is spread among the transistors in a normal AC steady-state condition In special conditions where heat is concentrated in one output device junction temperature should be calculated using a thermal resistance of 70 C W Note 2 Specification is at 25 C junction temperature due to requirements of high-speed automatic testing Actual values at operating temperatures will exceed the value at TJ e 25 C When supply voltages are g 15V no-load operating junction temperatures may rise 40 C to 60 C above ambient and more under load conditions Accordingly VOS may change one to several mV and N IIN will change significantly during warm-up Refer to IIN vs Temperature graph for expected values ote 3 Measured in still air seven minutes after application of power See graph of Input Current During Warm-up for further N information ote 4 Bandwidth is calculated from the rise time The EL2004 has a single pole gain and phase response up to the b3 dB N frequency Note 5 Slew rate is measured between VOUT e a 2 5V and b2 5V for this test gte 6 Slew rate is measured between VOUT e a 1V and b1V for this test Pulse repetition rate is k50 MHz o

15V AC Electrical Characteristics
VS e g 15V RL e 1 kX RS e 50X TJ e 25 C unless otherwise specified EL2004 Parameter Description Test Conditions Min BW Bandwidth (Note 4) RL e 50X ts Cin Settling Time to 1% Input Capacitance DVIN e 1V tr e 3 ns 200 140 Typ 350 200 6 3 Max Test Level I I V V Min 200 140 EL2004C Typ 350 200 6 3 Max Test Level I I V V Units

MHz MHz ns pF

3

EL2004 EL2004C
350 MHz FET Buffer
g 15V AC Electrical Characteristics
VS e g 15V RL e 1 kX RS e 50X TJ e 25 C unless otherwise specified

Contd
EL2004 EL2004C

Parameter

Description

Test Conditions

Test Test Units Min Typ Max Min Typ Max Level Level 2000 2500 1200 10 17 10 4 40 40 17 25 20 I V I I I V V V 2000 2500 1200 10 17 10 4 40 40 17 25 20 I V I I I V V V V ms V ms ns ns ns X dB dB

SR

Slew Rate

VIN e g 5V (Note 5) CL e 100 pF VIN e g 5V (Note 5)

tr

Rise Time DVIN P 0 6V Note See Test Figure DVIN P 0 6V RL e 50X Propagation Delay DVIN P 0 6V Note See Test Figure Output Impedance Power Supply Rejection Ratio Power Supply Rejection Ratio f e 1 MHz VIN e 1 VRMS DRL e 100X to Infinity DVS a e g 1 5 Vpeak f e 1 kHz DVSb e g 1 5 Vpeak f e 1 kHz

tp ROUT
a PSRR

b PSRR

g 5V AC Electrical Characteristics
VS e g 5V RL e 50X RS e 50X TJ e 25 C unless otherwise specified EL2004 Parameter Description Test Conditions EL2004C

Test Test Units Min Typ Max Min Typ Max Level Level 175 125 220 150 8 3 I IV V V I V 20 28 24 I IV I V V V 900 175 125 220 150 8 3 1200 500 16 23 12 4 30 30 20 28 24 I IV V V I V I IV I V V V MHz MHz ns pF V ms V ms ns ns ns X dB dB

BW

Bandwidth

RL e 1 kX (Note 4)

ts Cin SR

Settling Time to 1% Input Capacitance Slew Rate

DVIN e 1V tr e 3 ns

VIN e g 2V (Note 6) CL e 100 pF VIN e g 2V RL e 1 kX (Note 6)

900

1200 500 16 23 12 4 30 30

tr

Rise Time RL e 1 kX DVIN P 0 6V Note See Test Figure RL e 50X DVIN P 0 6V Propagation Delay RL e 1 kX DVIN P 0 6V Note See Test Figure Output Impedance Power Supply Rejection Ratio Power Supply Rejection Ratio f e 1 MHz VIN e 1 VRMS DRL e 100X to Infinity DVSb e g 0 5 Vpeak f e 1 kHz DVS a e g 0 5 Vpeak f e 1 kHz

tp ROUT
a PSRR

b PSRR

4

TD is 3 4in

TD is 2 7in

EL2004 EL2004C
350 MHz FET Buffer
AC Test Circuit

2004 ­ 4

Typical Performance Curves
TO-8 Maximum Power Dissipation

2004 ­ 5

Gain vs Input Voltage

Output Resistance vs Output Current

2004 ­ 7

5




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