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Part: EL7556CM
Category:
Power Management
-> PWM Power Supply
-> Module
Description: Adjustable Cpu Power Supply Unit
Company: Elantec Semiconductor, Inc. (acquired by Intersil)
Datasheet: Download EL7556CM datasheet File size : 485 kB
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Datasheet text preview:
EL7556C
Adjustable CPU Power Supply Unit
Featu res
· 6 Amps Continuous Load Current · Precision Internal 1% Reference · 1.0V to 3.8V Output Voltage · Internal Power MOSFETs · >90% Efficiency · Synchronous Switching · Adjustable Slope Compensation · Over Temperature Indicator · Pulse by Pulse Current Limiting · Operates up to 1MHz · 1.5% Typical Output Accuracy · Adjustable Oscillator w/Sync · Remote Enable/Disable · Intel P54 and P55 Compatible · VCC2DET Interface · Internal Soft Start
General Description
The EL7556C is an adjustable synchronous DC:DC switching regulator optimized for a 5V input and 1.0-3.8V output. By combining integrated NMOS power FETS with fused-lead packaging the EL7556 can supply up to 6A continuous output current without the use of external power devices or discrete heat sinks, thereby minimizing design effort and overall system cost. On chip resistorless current sensing is used to achieve stable, highly efficient, current-mode control. The EL7556 also incorporates the VCC2DET function to directly interface with the Intel P54 and P55 microprocessors. Depending on the state of VCC2DET the output voltage is internally preset to 3.50V or a user-adjustable voltage using two external resistors. In both internal and external feedback modes the active-high PWRGD output indicates when the regulator output is within +/-10% of the programmed voltage. An on-board sensor monitors die temperature (OT) for over-temperature conditions and can be connected directly to OUTEN to provide automatic thermal shutdown. Adjustable oscillator frequency and slope compensation allow added flexibility in overall system design.
Applications
· PC Motherboards · Local High Power CPU Supplies · 5V to 1.0V DC-DC Conversion · Portable Electronics/Instruments · P54 and P55 Regulators · GTL+ Bus Power Supply
Ordering Information
Part No. EL7556CM Temp. Range 0oC to 70oC Package 28-Pin SOIC Outline # MDP0027
1
EL7556C
Adjustable CPU Power Supply Unit
Connection Diagram
R4 100 C4 .1uF C7 100pF C8 220pF C3 .1uF AGND R5 10
6
R3 150
1
FB1 C REF CSLOPE COSC VDD VIN VSSP
FB2 CP C2V VSS VHI LX LX LX LX VSSP VSSP TEST PWRGD OT
28
VDD D3 C5 1uF
2
27
3
26
R1 100
-+
D2 D1
4
25
1uF C11
24
+ 10V -
5
R6 22
23
.1uF C6 L1 2.5uH 1mF C10 + 1.0V-3.8V 1 + R3 R4
C9 1mF
7
22
8
VIN VSSP VSSP VSSP VSSP VCC2DET OUTEN
21
5V
9
20
VO = 1.0
10
19
L1: Pulse Engineering PE-53681
11 18
PGND Connect to VSSP for external feedback
12
17
C9: 3X330uF C10: 3X330uF (Sprague 594D337X10010R2T) D1-D3: BAV99 fast diode
13
16
14
15
AGND and PGND should be connected at C10.
Fig 1.
2
Adjustable CPU Power Supply Unit
Absolute Maximum Ratings (TA = 25°C)
Storage Temperature Range Supply (VIN) Ambient Operating Temperature Output Pins
I m p or tan t Note: A l l parameters having Min/Max specifications are guaranteed. The Test Level column indicates the specific device testing actually performed during p r od u c ti on and Quality inspection. Elantec performs most electrical tests using modern high-speed automatic test equipment, specifically the LTX77 S e r i e s system. Unless otherwise noted, all tests are pulsed tests, therefore T J= T C = T A .
EL7556C
-65°C to +150°C 5.5V 0°C to +70°C -0.3V below GND, +0.3V above V D D
Operating Junction Temperature Peak Output Current Power Dissipation
135°C 9A 2.5W
Test Level
I II III IV V
Test Procedure
100% production tested and QA sample tested per QA test plan QCX0002. 100% production tested at TA = 25°C and QA sample tested at TA = 25°C, TM A X and TMIN per QA test plan QCX0002. Q A sample tested per QA test plan QCX0002. Parameter is guaranteed (but not tested) by Design and Characterization Data. Parameter is typical value at T = 25°C for information purposes only. A
DC Electrical Characteristics
VDD=VIN=5V, Cosc=1nF, Cslope=470pF, T A=25C unless otherwise specified
Parameter VC2V VREF VREFTC VREFLOAD FRAMP
IOSC_CHG
Description Voltage doubler output Reference accuracy Reference voltage tempco Reference load regulation Oscillator ramp amplitude Oscillator charge current Oscillator discharge current VCC2DET, OUTEN pull up current Cslope charging current FB1 input pull up current VDD supply current VDD standby current VIN no-load current LX output leakage to VSS Composite FET resistance RDSON tempco Output initial accuracy Output initial accuracy
Condition Vdd=5V, ILOAD=10mA IREF=0 0
Min 7.2 1.157 -.5
Typ 7.8 1.169 50
Max 8.4 1.181 .5
Test Level I I V I V V V
Units V V ppm % V uA mA uA uA uA mA mA uA uA mohms m/C V V
1.2 150 5 10 23 OUTEN=4V, Fosc=120kHz OUTEN=0 OUTEN=0 LX=0V 18 .1 VCC2DET=4V, IL=3A (See Fig. 1 ) VCC2DET=0V, IL=3A R3=150, R4=100 (See Fig 1). 3.450 2.450 3.500 2.500 3.550 2.550 14 28.5 2 11 1.5 100 25 5 200 100 30 18 34
IOSC_DIS IPUP ICSLOPE IFB1 IDD IDDOFF IVIN ILEAK RDSON RDSONTC VOUT1 VOUT2
I I V I I I I I V IV IV
3
EL7556C
Adjustable CPU Power Supply Unit
DC Electrical Characteristics
VDD=VIN=5V, Cosc=1nF, Cslope=470pF, T A=25C unless otherwise specified
Parameter VOUTLINE VOUTLOAD ILMIN RSHORT ILMAX VOUTTC TOT THYS ROT VPWGD VDDOFF VDDON VHYS VIH VIL VOH_PWGD VOL_PWDG Description Output line regulation Output load regulation Minimum load current Short circuit load resistance. See Note 1. Current limit Output tempco Over temperature threshold Over temperature hysteresis Over temperature pull up resistance OT=0V 12 +6 3.15 4.15 VHYS=VDDON-VDDOFF 4 .8 Iload=1mA Iload=-1mA 3.5 1.0 .5 0 oC < Ta < 70 oC Condition VDD=5V, +/- 10% .5AoC oC
k
% V V V V V V V
Power good threshold relative to VCC2SEL=4V, VOUT=3.50V programmed output voltage Maximum VDD for shutdown Minimum VDD for startup Supply input hysterisis VCC2DET, OUTEN input high . VCC2DET, OUTEN input low. Powergood drive high Powergood drive low
Note1: When operating at maximum load current a short circuit from Vout to GND of less than 100m may cause the IC to enter a nondestructive latch up mode. If latchup occurs the power supply to the IC must be recycled to resume normal operation. To protect the IC under short circuit conditions connect OUTEN to OT. Prolonged operation a latched state is not recommended.
AC Electrical Characteristics
VDD=VIN=5V, Cosc=1nF, Cslope=470pF, T A=25C unless otherwise specified
Parameter FOSC tsync MSS tbrm tLEB DMAX Description Oscillator initial accuracy Minimum oscillator sync width Soft start slope FET break before make delay High side FET minimum on time (LEB) Maximum duty cycle (See Fig 1). Condition Min 100 Typ 120 50 7 10 100 96 V V Max 140 Test Level I V V Units kHz ns V/msec ns ns %
4
Adjustable CPU Power Supply Unit
EL7556C Pin Description (I=Input O=Output S=Supply)
Pin Number Name
1 FB1
EL7556C
Pin Type
I
Description
Voltage feedback for the buck regulator. Active when VCC2DET is logic low. Normally connected to external resistor divider between VOUT and GND. A 2uA pull-up current forces VOUT to VSS in the event that FB1 is floating and VCC2DET is inadvertently connected to GND. Bandgap reference bypass capacitor. Typically .47uF to VSS. Slope compensation capacitor. Ramp width corresponds to LX duty cycle. CSLOPE to COSC ratio is normally 1:2.2 Oscillator timing capacitor. Fosc(Hz) can be approximated by: Fosc(kHz)=.0001/COSC. COSC in Farads Power Supply for PWM control circuitry. Normally the same potential as VIN. Power Supply input to the buck regulator. Connected to the drain of the high-side NMOS FET. Ground return to the buck regulator. Connected to the source of the low-side synchronous NMOS FET. Same as pin 6. Same as pin 7. Same as pin 7. Same as pin 7. Same as pin 7. VCC2DET interface logic input. When driven to logic 1 VOUT =3.500V, When driven to logic 0 the PWM uses FB1 to determine VOUT: VOUT=1.0V*(1+R3/R4). The switching regulator output is enabled when logic 1. The reference voltage output operates whenever the power supply is qualified (VDD > VPOR) regardless of the state of this pin. Over temperature indicator. Normally high. Pulls low when die temperature exceeds 120C, returns to the high state when die temperature has cooled to 80C. Power good window comparator output. Logic 1 when regulator output is within +/-10% of programmed voltage. Test pin. Must be connected to VSSP in normal operation. Same as pin 7. Same as pin 7. Inductor drive pin. High current digital output whose average voltage equals the regulator output voltage. Same as pin 20. Same as pin 20. Same as pin 20. Gate drive to high side driver. Bootstrapped from LX with a .1uF capacitor. Ground return for internal control circuitry. Connected to voltage doubler output. Supplies gate drive to the low-side driver. Drives the negative side of charge pump capacitor at one-half the oscillator frequency Fosc. Voltage feedback pin. Active when VCC2DET is logic 1. Internally preset to VOUT=3.50V
2 3
CREF CSLOPE
I I
4 5 6 7 8 9 10 11 12 13
COSC VDD VIN VSSP VIN VSSP VSSP VSSP VSSP VCC2DET
I S S S S S S S S I
14
OUTEN
I
15
OT
O
16
PWRGD
O
17 18 19 20 21 22 23 24 25 26 27 28
TEST VSSP VSSP LX LX LX LX VHI VSS C2V CP FB2
I S S O O O O I S I O I
5
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