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Part: EDS1232AABB
Category:
Memory
-> DRAM
-> DDR SDRAM
Description: 128m Bits Sdram
Company: Elpida Memory
Datasheet: Download EDS1232AABB datasheet File size : 719 kB
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Datasheet text preview:
PRELIMINARY DATA SHEET
128M bits SDRAM
EDS1232AABB, EDS1232AATA (4M words × 32 bits)
Description
The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II).
Features
· · · · · 3.3V power supply Clock frequency: 166MHz (max.) Single pulsed /RAS ×32 organization 4 banks can operate simultaneously and independently · Burst read/write operation and burst read/single write operation capability · Programmable burst length (BL): 1, 2, 4, 8 and full page · 2 variations of burst sequence Sequential (BL = 1, 2, 4, 8) Interleave (BL = 1, 2, 4, 8) · Programmable /CAS latency (CL): 2, 3 · Byte control by DQM · Refresh cycles: 4096 refresh cycles/64ms · 2 variations of refresh Auto refresh Self refresh · FBGA package is lead free solder (Sn-Ag-Cu)
Document No. E0205E50 (Ver. 5.0) Date Published July 2002 (K) Japan URL: http://www.elpida.com Elpida Memory, Inc. 2001-2002
EDS1232AABB, EDS1232AATA
Ordering Information
Part number EDS1232AABB-60-E EDS1232AABB-75-E EDS1232AABB-60L-E EDS1232AABB-75L-E EDS1232AATA-60 EDS1232AATA-75 EDS1232AATA-60L EDS1232AATA-75L 3.3V 4M × 32 4 Supply voltage 3.3V Organization (words × bits) Internal Banks 4M × 32 4 Clock frequency MHz (max.) 166 133 133 100 166 133 133 100 166 133 133 100 166 133 133 100 /CAS latency 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 Package 90-ball FBGA
86-pin plastic TSOP (II)
Part Number
E D S 12 32 A A BB - 60 L - E
Elpida Memory Lead Free Type
D: Monolithic Device
Product Code S: SDRAM Density / Bank 12: 128M/4 Banks Bit Organization 32: x32 Voltage, Interface A: 3.3V, LVTTL Die Rev.
Power Consumption Blank: Normal L: Low Power
Speed 60: 166MHz/CL3 133MHz/CL2 75: 133MHz/CL3 100MHz/CL2 Package TA: TSOP (II) BB: FBGA
Preliminary Data Sheet E0205E50 (Ver. 5.0)
2
EDS1232AABB, EDS1232AATA
Pin Configurations
/xxx indicate active low signal.
90-ball FBGA
1 2 3 4 5 6 7 8 9
86-pin TSOP VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 NC VDD DQM0 /WE /CAS /RAS /CS A11 BA0 BA1 A10(AP) A0 A1 A2 DQM2 VDD NC DQ16 VSSQ DQ17 DQ18 VDDQ DQ19 DQ20 VSSQ DQ21 DQ22 VDDQ DQ23 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 (Top view) 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 VSS DQ15 VSSQ DQ14 DQ13 VDDQ DQ12 DQ11 VSSQ DQ10 DQ9 VDDQ DQ8 NC VSS DQM1 NC NC CLK CKE A9 A8 A7 A6 A5 A4 A3 DQM3 VSS NC DQ31 VDDQ DQ30 DQ29 VSSQ DQ28 DQ27 VDDQ DQ26 DQ25 VSSQ DQ24 VSS
A
DQ26 DQ24 VSS VDD DQ23 DQ21 VDDQ VSSQ DQ19 DQ22 DQ20 VDDQ DQ17 DQ18 VDDQ NC A2 A10 NC BA0 /CAS VDD DQ6 DQ1 DQ16 VSSQ DQM2 VDD A0 BA1 /CS A1 A11 /RAS
B
DQ28 VDDQ VSSQ
C
VSSQ DQ27 DQ25
D
VSSQ DQ29 DQ30
E
VDDQ DQ31 NC A3 A6 NC A9 NC VSS
F
VSS DQM3
G
A4 A5 A8 CKE NC
H
A7
J
CLK
K
DQM1 /WE DQM0 DQ7 VSSQ DQ5 VDDQ DQ3 VDDQ
L
VDDQ DQ8
M
VSSQ DQ10 DQ9
N
VSSQ DQ12 DQ14
P
DQ11 VDDQ VSSQ VDDQ VSSQ DQ4 VDD DQ0 DQ2
R
DQ13 DQ15 VSS
(Top view)
Pin name A0 to A11 BA0, BA1 DQ0 to DQ31 CLK CKE /CS /RAS /CAS /WE DQM0 to DQM3 VDD VSS VDDQ VSSQ NC
Function Address inputs Bank select Data input/output Clock input Clock enable Chip select Row address strobe Column address strobe Write enable DQ mask enable Supply voltage Ground Supply voltage for DQ Ground for DQ No connection
Preliminary Data Sheet E0205E50 (Ver. 5.0)
3
EDS1232AABB, EDS1232AATA
CONTENTS Description .......... 1 Features .............. 1 Ordering Information .... 2 Part Number........ 2 Pin Configurations........ 3 Electrical Specifications .............. 5 Block Diagram............ 10 Pin Function ...... 11 Command Operation.. 12 Truth Table........ 16 Simplified State Diagram .......... 22 Programming Mode Registers ........... 23 Mode Register............ 24 Power-up sequence ... 27 Operation of the SDRAM .......... 28 Timing Waveforms ..... 44 Package Drawing....... 51 Recommended Soldering Conditions ......... 53 Revision History ......... 56
Preliminary Data Sheet E0205E50 (Ver. 5.0)
4
EDS1232AABB, EDS1232AATA
Electrical Specifications
· All voltages are referenced to VSS (GND). · After power up (refer to the Power up sequence). Absolute Maximum Ratings
Parameter Voltage on any pin relative to VSS Supply voltage relative to VSS Short circuit output current Power dissipation Operating ambient temperature Storage temperature Symbol VT VDD, VDDQ IOS PD TA Tstg Rating 0.5 to +4.6 0.5 to +4.6 50 1.0 0 to +70 55 to +125 Unit V V mA W °C °C Note
Caution Exposing the device to stress above those listed in Absolute Maximum Ratings could cause permanent damage. The device is not meant to be operated under conditions outside the limits described in the operational section of this specification. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Recommended Operating Conditions (TA = 0 to +70°C) °
Parameter Supply voltage Input high voltage Input low voltage Symbol VDD, VDDQ VSS VIH VIL min. 3.0 0 2.0 0.3*
2
typ. 3.3 0
max. 3.6 0 VDD + 0.3*1 0.8
Unit V V V V
Notes
Notes: 1. VIH (max.) = VDDQ + 1.5V (pulse width 5ns). 2. VIL (min.) = 1.5V (pulse width 5ns).
Preliminary Data Sheet E0205E50 (Ver. 5.0)
5
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