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Part: EM6620WP11
Category:
Description: Ultra-low Power MCU With Integrated 4x8 LCD Driver0.5mA, 1.2V, 1.3kx16 ROM
Company: EM Microelectronic
Datasheet: Download EM6620WP11 datasheet File size : 827 kB
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EM MICROELECTRONIC - MARIN SA
EM6620
Ultra Low Power Microcontroller with 4x8 LCD Driver
Features
· Low Power - 2.1 µA active mode, LCD On - 0.5 µA standby mode, LCD Off - 0.1 µA sleep mode @ 1.5V, 32kHz, 25°C Low Voltage - 1.2 to 3.6 V SVLD - metal mask programmable (2.0V) ROM - 1280 × 16 bits RAM - 64 × 4 bits 2 clocks per instruction cycle 72 basic instructions Oscillation supervisor Timer watchdog (2 sec) Max. 8 inputs ; port A, port B max. 4 outputs ; port B LCD 8 segments, 3 or 4 times multiplexed Universal 10-bit counter, PWM, event counter Prescaler down to 1 Hz (crystal = 32 KHz) 1/1000 sec, 12 bit binary coded decimal counter with hard or software start/stop function Frequency output 1Hz, 2048 Hz, 32 KHz, PWM 7 internal interrupt sources (BCD counter, 2×10-bit counter, 3× prescaler, SVLD) 5 external interrupt sources (port A, compare) Figure 1. Architecture
· · · · · · · · · · · · · · · · · ·
Description
The EM6620 is an advanced single chip CMOS 4bit microcontroller. It contains ROM, RAM, power on reset, watchdog timer, oscillation detection circuit, 10 bit up/down counter, Millisecond counter, prescaler, voltage level detector (SVLD), compare input, frequency output, LCD driver and several clock functions. The low voltage feature and low power consumption make it the most suitable controller for battery, stand alone and mobile equipment. The EM6620 is manufactured using EM Microeletronic's Advanced Low Power (ALP) CMOS Process. Figure 2. Pin Configuration
Typical Applications
· · · · · · · · · Timing device Medical applications Domestic appliance Timer / sports timing devices Safety and security devices Automotive controls with display Measurement equipment Interactive system with display Bicycle computers
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EM6620
EM6620 at a glance
· Power Supply - Low voltage low power architecture including internal voltage regulator - 1.2 ... 3.6 V battery voltage - 2.1 µA in active mode (Xtal, LCD on, 25°C) - 0.5 µA in standby mode (Xtal, LCD off, 25°C) - 0.1 µA in sleep mode (25°C) - 32 KHz Oscillator · Prescaler - 15 stage system clock divider down to 1Hz - 3 Interrupt requests; 1Hz, 32Hz or 8Hz, Blink - Prescaler reset (4kHz to 1Hz)
· 4-Bit Bi-directional Port B - All different functions bit-wise selectable
· · ·
RAM ROM CPU
- 64 x 4 bit, direct addressable
- 1280 x 16 bits, metal mask programmable
- Direct input read on the port terminals - Data output latches - CMOS or Nch. open drain outputs - Pull-down or pull-up selectable - Weak pull-up in Nch. open drain mode - Selectable PWM, 32kHz, 1kHz and 1Hz output - Dynamic Input Comparator on PB[0] (SVLD level) · Voltage Level Detector - Mask selectable level, default 2.0V - Busy flag during measure - Interrupt request at end of measure
·
- 4 bit RISC architecture - 2 clock cycles per instruction - 72 basic instructions · Main Operating Modes and Resets - Active Mode (CPU is running) - Standby Mode (CPU in halt) - Sleep Mode (no clock, reset state) - Initial reset on power on (POR) - Watchdog reset (logic and oscillation watchdogs) - Reset with input combination on port A (register selectable) · Liquid Crystal Display Driver - 8 segments 3 or 4 times multiplexed - Internal or external voltage multiplier - Free segment allocation architecture (metal 2 mask) - LCD switch off for power save
10-Bit Universal Counter
- 10, 8, 6 or 4 bit up/down counting - Parallel load - Event counting (PA[0] or PA[3]) - 8 different input clocks- Full 10 bit or limited (8, 6, 4 bit) compare function - 2 interrupt requests (on compare and on 0) - Hi-frequency input on PA[3] and PA[0] - Pulse width modulation (PWM) output
·
(LCD)
Millisecond Counter
- 3 digits binary coded decimal counter (12 bits) - PA[3] signal pulse width and period measurement - Internal 1000 Hz clock generation - Hardware or software controlled start stop mode - Interrupt request on either 1/10 Sec or 1Sec · Interrupt Controller - 5 external and 7 internal interrupt request sources - Each interrupt request individually maskable - Each interrupt flag individually resettable - Automatic reset of each interrupt request register after read - General interrupt request to CPU can be disabled - Automatic enabling of general interrupt request flag when going into HALT mode
· 4-Bit Input Port A - Direct input read on the port terminals - Debouncer function available on all inputs - Interrupt request on positive or negative edge - Pull-up or pull-down or none selectable by register - Test variables (software) for conditional jumps - PA[0] and PA[3] are inputs for the event counter - PA[3] is Start/Stop input for the millisecond counter - Reset with input combination (register selectable)
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EM6620
Table of Contents
Features _________________________________1 Description _______________________________1 TYPICAL applications _______________________1 EM6620 at a glance ________________________2 1. PIN DESCRIPTION FOR EM6620 _________ 4 2. OPERATING MODES ___________________ 6 2.1 ACTIVE MODE ________________________ 6 2 .2 STANDBY MODE ______________________ 6 2.3 SLEEP MODE _________________________ 6 3. POWER SUPPLY ______________________ 7 4. RESET _______________________________ 8 4.1 OSCILLATION DETECTION CIRCUIT__________9 4.2 INPUT PORT A RESET ____________________ 9 4.3 DIGITAL WATCHDOG TIMER RESET ________ 10 4.4 CPU STATE AFTER RESET _______________ 10 5. OSCILLATOR AND PRESCALER ________ 11 5.1 OSCILLATOR __________________________ 11 5.2 PRESCALER __________________________ 11 6. INPUT AND OUTPUT PORTS ___________ 13 6.1 PORTS OVERVIEW______________________13 6.2 PORT A______________________________14 6.2.1 IRQ on Port A ____________________ 14 6.2.2 Pull-up/down _____________________ 15 6.2.3 Software test variables______________15 6.2.4 Port A for 10-Bit Counter and MSC ___ 15 6.3 PORT A REGISTERS_____________________15 6.4 PORT B______________________________17 6.4.1 Input / Output Mode _______________ 17 6.4.2 Pull-up/Down ____________________ 18 6.4.3 CMOS / NCH. Open Drain Output ____ 18 6.4.4 PWM and Frequency output _________ 19 6.5 PB[0] DYNAMIC INPUT COMPARATOR ______ 19 6.6 PORT B REGISTERS _____________________ 20 7. 10-BIT COUNTER _____________________ 21 7.1 FULL AND LIMITED BIT COUNTING_________21 7.2 FREQUENCY SELECT AND UP/DOWN COUNTING22 7.3 EVENT COUNTING _____________________ 23 7.4 COMPARE FUNCTION ___________________ 23 7.5 PULSE WIDTH MODULATION (PWM) _______ 23 7.5.1 How the PWM Generator works.______24 7.5.2 PWM Characteristics_______________24 7.6 COUNTER SETUP ______________________ 25 7.7 10-BIT COUNTER REGISTERS _____________ 25 8. MILLISECOND COUNTER ______________ 27 8.1 PA[3] INPUT FOR MSC _________________ 27 8.2 IRQ FROM MSC_______________________27 8.3 MSC-MODES _________________________ 28 8.4 8.5 MODE SELECTION _____________________ 28 MILLISECOND COUNTER REGISTERS _______ 30 9. INTERRUPT CONTROLLER ____________ 31 9.1 INTERRUPT CONTROL REGISTERS__________ 32 10. 1 0 .1 11. 12. 12.1 12.2 12.3 12.4 13. 14. 15. SUPPLY VOLTAGE LEVEL DETECTOR _ 33 SVLD REGISTER ______________________ 33 RAM ______________________________ 34 LCD DRIVER _______________________ 35 LCD CONTROL _______________________ 36 LCD ADDRESSING _____________________ 36 FREE SEGMENT ALLOCATION _____________ 37 LCD REGISTERS ______________________ 37 PERIPHERAL MEMORY MAP _________ 39 OPTION REGISTER MEMORY MAP ____ 42 ACTIVE SUPPLY CURRENT TEST _____ 43
16. MASK OPTIONS ____________________ 44 16.1 INPUT / OUTPUT PORTS _________________ 44 16.1.1 Port A Metal Options ______________ 44 16.1.2 Port B Metal Options ______________ 45 16.1.3 Voltage Regulator Option___________ 46 16.1.4 SVLD and Input Comp Level Option __ 46 16.1.5 Debouncer frequency Option ________ 46 16.1.6 User defined LCD Segment allocation _ 46 17. 17.1 17.2 17.3 17.4 TEMP. AND VOLTAGE BEHAVIORS ____ 47 IDD CURRENT (TYPICAL) _______________ 47 PULL-DOWN RESISTANCE (TYPICAL) _______ 47 PULL-UP RESISTANCE (TYPICAL) __________ 48 OUTPUT CURRENTS (TYPICAL)____________ 48
18. EM6620 ELECTRICAL SPECIFICATIONS 49 18.1 ABSOLUTE MAXIMUM RATINGS ___________ 49 18.2 HANDLING PROCEDURES________________ 49 18.3 STANDARD OPERATING CONDITIONS_______ 49 18.4 DC CHARACTERISTICS - POWER SUPPLY ____ 49 1 8 .5 SVLD AND INPUT COMPARATOR _________ 50 18.6 OSCILLATOR _________________________ 50 18.7 DC CHARACTERISTICS - I/O PINS _________ 51 18.8 LCD SEG[8:1] OUTPUTS ________________ 52 18.9 LCD COM[4:1] OUTPUTS _______________ 52 18.10 DC OUTPUT COMPONENT _____________ 52 18.11 LCD VOLTAGE MULTIPLIER ____________ 52 19. 20. 20.1 20.2 20.3 21. PAD LOCATION DIAGRAM ___________ 53 PACKAGE & ORDERING INFORMATION 54 ORDERING INFORMATION _______________ 56 PACKAGE MARKING ___________________ 56 CUSTOMER MARKING __________________ 56 SPEC. UPDATE _____________________ 57
EM Microelectronic-Marin SA cannot assume responsibility for use of any circuitry described other than circuitry entirely embodied in an EM Microelectronic-Marin SA product. EM Microelectronic-Marin SA reserves the right to change the circuitry and specifications without notice at any time. You are strongly urged to ensure that the information given has not been superseded by a more up-to-date version.
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EM6620
1. Pin Description for EM6620
Chip QFP DIL 44 40 1 13 7 2 14 8 3 15 9 4 16 10 5 18 11 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 19 20 21 25 26 27 28 29 30 31 32 33 35 36 37 38 39 40 41 43 1 2 3 5 6 8 10 11 12 13 14 17 18 19 20 21 22 23 24 25 27 28 29 30 31 32 33 35 36 37 38 39 40 1 3 5 QFP 32 9 10 11 12 13 14 15 16 17 18 19 nc 20 21 22 23 24 25 26 27 28 29 30 31 32 1 2 3 4 5 6 7 8 Signal Name C2B C2A C1B C1A VL1 VL2 VL3 COM[4] COM[3] COM[2] COM[1] SEG[8] SEG[7] SEG[6] SEG[5] SEG[4] SEG[3] SEG[2] SEG[1] Test PB[0] PB[1] PB[2] PB[3] PA[0] PA[1] PA[2] PA[3] VBAT=VDD Vreg Qout / Osc2 Qin / Osc1 VSS Function Voltage multiplier Voltage multiplier Voltage multiplier Voltage multiplier Voltage multiplier level 1 Voltage multiplier level 2 Voltage multiplier level 3 LCD back plane 4 LCD back plane 3 LCD back plane 2 LCD back plane 1 LCD segment 8 LCD segment 7 LCD segment 6 LCD segment 5 LCD segment 4 LCD segment 3 LCD segment 2 LCD segment 1 Input test terminal Internal pull-down 15k Input/output, open drain port B terminal 0 Input/output, open drain port B terminal 1 Input/output, open drain port B terminal 2 Input/output, open drain port B terminal 3 Input port A terminal 0 Input port A terminal 1 Input port A terminal 2 Input port A terminal 3 Positive power supply Internal voltage regulator Crystal terminal Crystal terminal Negative power supply Remarks Not needed if ext. supply Not needed if ext. supply Not needed if ext. supply Not needed if ext. supply LCD level 1 input, if external supply selected LCD level 2 input, if external supply selected LCD level 3 input, if external supply selected Not used if 3 times multiplex selected
Not bonded for QFP 32
For EM tests only, GND 0 ! except when needed for MFP programming Port B data[0] I/O or dynamic input comparator input Port B data[1] I/O or ck[12] output Port B data[2] I/O or ck[1] output Port B data[3] I/O or PW M output Testvar 1 Event counter Testvar 2 Testvar 3 Event counter MSC start/stop control MFP Connection Connect to minimum 100nF, MFP Connection 32kHz crystal, MFP Connection 32kHz crystal, MFP Connection Reference terminal, MFP Connection
* gray shaded : terminals needed for MFP programming connections (VDD, VregLogic, Qin, Qout, Test, VSS).
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EM6620
Figure 3. Typical configuration
L C D D is p l a y
C1 C1 C1 VL1 VL2 VL3 C 1A C 1B C 2A C 2B C O M [4 :1 ] S E G [ 8 :1 ]
c r ys ta l
Q IN QOUT
a ll C a p a c ito rs 1 0 0 n F
C2 C2
EM 6620
V D D (V B A T ) V re g T est
P o rt A VSS P o rt B
C3
C4
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