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Details, datasheet, quote on part number:V3022SO28A
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Datasheet text preview:
R
EM MICROELECTRONIC-MARIN SA
V3022
Very Low Power 8-Bit 32 kHz RTC Module with Digital Trimming and High Level Integration
Features
n Built-in crystal with digital trimming and temperature compensation facilities n 50 ns access time with 50 pF load capacitance n Standby on power down typically 1.2 mA n Wide voltage range, 2.0 V to 5.5 V n Universal interface compatible with both Intel and Motorola n Simple 8 bit interface with no delays or busy flags n Power fail input disables during power up / down of reset n Bus can be tri-state in power fail mode n 12 or 24 hour data formats n Time to 1/100 of a second n Leap year correction and week number calculation n Alarm and timer interrupts n Programmable interrupts: 10 ms, 100 ms, s or min n Sleep mode capability n Alarm programmable up to one month n Timer measures elapsed time up to 24 hours O n Temperature range -40 to +85 C n Package SO28
Typical Operating Configuration
WR or R/W RD or DS IRQ
CPU
Address Decoder
Address Bus
Data Bus
CS IRQ RD WR V 3022 A/D AD0 to AD7
Description
The V3022 is a low power CMOS real time clock with a built-in crystal. Standby current is typically 1.2 mA and the access time is 50 ns. The interface is 8 bits with multiplexed address and data bus. Multiplexing of address and data is handled by the input line A/D. There are no busy flags in the V3022, internal time update cycles are invisible to the user's software. Time data can be read from the V3022 in 12 or 24 hour data formats. An external signal puts the V3022 in standby mode. Even in standby, the V3022 pulls the IRQ pin active low on an internal alarm interrupt. Calendar functions include leap year correction and week number calculation. Time precision can be achieved by digital trimming. CS RD WR Fig. 1
Pin Assignment
SO28 TEST PF AD0 AD1 NC AD2 AD3 A/D IRQ VSS VSS VSS VSS VSS NC AD7 AD6 AD5 NC AD4 RD WR CS VDD VDD VDD VDD VDD Fig. 2
Applications
n n n n n Industrial controllers Alarm systems with periodic wake up PABX and telephone systems Point of sale terminals Automotive electronics
A0
V 3022
1
R
V3022
Absolute Maximum Ratings
Parameter
Maximum voltage at VDD Max. voltage at remaining pins Min. voltage on all pins Maximum storage temperature Minimum storage temperature Maximum electrostatic discharge to MIL-STD-883C method 3015 Maximum soldering conditions Shock resistance
Handling Procedures
VSS + 7.0V VDD + 0.3V VSS - 0.3V +125 C 0 -55 C 1000V 250OC x 10s 5000 g. 0.3ms,½ sine Table 1
O
Symbol Conditions
VDDmax Vmax Vmin TSTOmax TSTOmin VSmax TSmax
This device has built-in protection against high static voltages or electric fields; however, it is advised that normal precautions must be taken as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the supply voltage range. Unused inputs must always be tied to a defined logic voltage level.
Operating Conditions
Parameter
Operating temperature Logic supply voltage Supply voltage dv/dt (power-up & down) Decoupling capacitor
Symbol Min. Typ. Max. Units
TA VDD dv/dt 100 -40 2.0 +85 5.0 5.5 6
O
C V
Stresses above these listed maximum ratings may cause permanent damage to the device. Exposure beyond specified operating conditions may affect device reliability or cause malfunction.
V/ms nF Table 2
Electrical Characteristics
VDD = 5.0V ± 10%, VSS = 0 V, TA = -40 to 85OC, unless otherwise specified
Parameter
Standby current
1)
Symbol Test Conditions
IDD IDD VDD = 3 V, PF = 0 PF = 0 CS = 4 MHz, RD = VSS, WR = VDD IOL = 8 mA IOL = 1 mA, VDD = 2 V
o
Min.
Typ.
1.2 2
Max.
10 15 1.5
Units
mA mA mA
Dynamic current2) IRQ (open drain) Output low voltage Output low voltage Inputs and Outputs Input logic low Input logic high Output logic low Output logic high PF activation voltage PF hysteresis Input leakage Output tri-state leakage Oscillator Characteristics Starting voltage Start-up time Frequency Characteristics Frequency tolerance Frequency stability Temperature stability Aging
1)
VOL VOL
0.4 0.4
V V
VIL VIH VOL VOH VPFL VH IIN ITS VSTA VSTA TSTA Df/f fsta tsta tag
TA = +25 C o TA = +25 C IOL = 6 mA IOH = 6 mA
0.2 VDD 0.8 VDD 0.4 2.4 0.5 VDD 100 10 10 2 2.5 1
VSS1000 1000
V V V V V mV nA nA
V V s
TA = +25OC addr. 10 hex = 00 hex 3) 2.0 £ VDD £ 5.5 V addr. 10 hex = 00 hex o TA = + 25 C, first year
150
210 1 see Fig. 5
4)
251 5
5
ppm ppm/V ppm ppm/year Table 3
With PFO = 0 (VSS) all I/O pads can be tri-state, tested. With PFO = 1 (VDD), CS = 1 (VDD) and all other I/O pads fixed to VDD or to VSS: same standby current, not tested. All other inputs to VDD and all outputs open. At a given temperature. See Fig. 4
2) 3) 4)
2
R
V3022
Typical Standby Current at VDD = 5 V
IDD [mA] 5 4 3 2 1 0 -50 25 50 80 95 TA [ C] Fig. 3
0
Typical standby current range at VDD = 5 V
Typical Frequency on IRQ
DF [ppm] Fo 250 200 150 100 50 0 -50 -30 -10 10 30 50 70 90
Address 10 hex = 00 hex
TA [0C]
Fig. 4
Module Characteristic
DF Fo [ppm] -100 DF ppm 2 = - 0.038 O 2 (T - TO) ±10% FO C DF/FO = the ratio of the change in frequency to the nominal value expressed in ppm (It can be thought of as the frequency deviation at any temperature.) o T = the temperature of interest in C O = the turnover temperature (25 ±5 C) TO To determine the clock error (accuracy) at a given temperature, add O the frequency tolerance at 25 C to the value obtained from the formula above. TO-100 TO-50 TO
O
Frequency ratio [ppm]
ma
x.
-200
-300
-400 TO+50 TO+100 T [ C]
O
min
.
Temperature [ C]
Fig. 5
3
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