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Details, datasheet, quote on part number:XR16C872
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Datasheet text preview:
Preliminary
XR16C872
Dual UART with 1284 Parallel Port and Plug-and-Play Controller
June 1999-1
FEATURES · Plug and Play ISA Bus Specification Compliant - Auto Configuration - Direct Connection, Needing no External Buffers - Resource Data in External 4K EEPROM - 10-Interrupts IRQ3-7, IRQ9-12, IRQ15 · Manual Configuration for Standard COM1-COM-4 and LPT1-LPT2 · IEEE 1284 Compliant - Bidirectional Host Port - Level-II Electrical Interface, Needing no External Transceivers - Standard Centronics/ECP/EPP Mode - 16-byte FIFO in ECP mode · Dual UART Software Compatible with 16C550 · 128-Byte Transmit and Receiver FIFOs Reduce CPU Interrupt · FIFO Counters in Transmitter and Receiver · Automatic RTS/CTS Flow Control with Hysteresis to Increase Data Throughput DESCRIPTION The XR16C8721 (872) is a dual universal asynchronous receiver and transmitter (UART) with a 1284 bi-directional parallel port and ISA Bus Plug-and-Play (PnP) interface. The PnP interface supports auto configuration for desktop and embedded PC computers. The host bus interface can also be configured to manually support standard PC addresses COM1-4 and LPT1-2. The parallel port is compatible to IEEE 1284 specification and supports Compatible Centronics, Extended Capability (ECP) and Enhanced Parallel Port (EPP) protocols. The UARTs are software compatible to industry standard 16C550 and include enhanced features of 128 bytes of transmit and receive FIFOs, programmable transmit and receive FIFO trigger levels, transmit and receive FIFO counters, IrDA (Infrared ORDERING INFORMATION
Part Number XR16C872CQ XR16C872IQ Package Operating Temperature 100-Lead QFP 0° C to + 70° C 100-Lead QFP -40° C to + 85° C
· IrDA Infrared Pulse Shaping Encoder/Decoder for up to 115.2Kbps Data Rate · Up to 460.8 Kbps Standard Serial Data Rate · +5V and +3.3V Operation · 100-pin Quad Flat Package (14x20mm) · Reference PC ISA Card Design Available · Windows2 95, 98 and NT4.0 Device Drivers are Available
APPLICATIONS · Multi-function PC/ISA Bus Card with RS-232/ RS-422/RS-485 Interface and Printer/parallel Port · Embedded Systems · Portable Infrared Wireless Systems · High-speed Bidirectional Parallel Port · High-speed Serial Ports
Data Association) encoder/decoder, automatic RTS/ CTS hardware flow control with selectable hysteresis, and automatic software (Xon/Xoff) flow control. On board status registers provide interrupt priorities, receive data errors and modem status. Each channel has a programmable baud rate generator to provide data rates up to 460.8Kbps. The bi-directional parallel port can be configured as a general purpose input/output interface or connected to a printer or portable storage devices. The 872 operates on a single +5V and +3.3 power supply. It is available in a small 100-pin QFP package and offers commercial and industrial temperature ranges. The chip is fabricated in an advanced CMOS process to reduce power consumption.
Notes: 1 Covered by U.S. patent number 5,649,122 and patent pending. 2 Windows is a trademark of Microsoft Corp.
Rev. P1.00
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 · (510) 668-7000 · FAX (510) 668-7017 · www@exar.com
XR16C872
Preliminary
UART Channel A Internal Bus Transmit FIFO (128 bytes) Transmit Shift Register IrDA v1.0 Encoder Receive Shift Register IrDA v1.0 Decoder DTRA# RTSA# VCC MAN# Baud Rate Gen. Modem Interface DSRA# CTSA# CDA# RIA# TXB, RXB, DTR#, RTS#, etc. PD0-PD7 RESET 7.3728 MHz XTAL1 (22.1184 MHz) XTAL2 Divide by 3 1284 Bi-directional Parallel Port Controller with Level II Electrical Interface INIT# STROBE# SELCTIN# AUTOFD# PDIR PE SELECT BUSY ACK# ERR# TXA
To ISA Bus
D0-D7 A0-A15 AEN IOR# IOW# IOCHRDY IRQ3-7,9-12,15 DREQ0,1,3,5 DACK0,1,3,5# TC ISA Bus Plug-and-Play Controller
UART Control Registers
Receive FIFO (128 bytes)
RXA To Serial Port A Transceivers
To External EEPROM
EED EECLK EECS
EEPROM Controller
UART Channel B (same as channel A block)
To Serial Port B Transceivers
To Parallel Port Printer
Osc./ Buffer
Figure 1. Functional Block Diagram with Plug-and-Play Interface
Rev. P1.00
2
Preliminary
XR16C872
UART Channel A Internal Bus Transmit FIFO (128 bytes) Transmit Shift Register IrDA v1.0 Encoder Receive Shift Register IrDA v1.0 Decoder DTRA# RTSA# DSRA# CTSA# CDA# RIA# TXB, RXB, DTR#, RTS#, etc. To Serial Port B Transceivers TXA
To ISA Bus
D0-D7 A0-A10 AEN IOR# IOW# IOCHRDY IRQ3 IRQ4 IRQ5 IRQ7 DREQ3 DACK3# TC MAN#
ISA Bus Interface Controller
UART Control Registers
Receive FIFO (128 bytes)
RX A
To Serial Port A Transceivers
Modem Interface Baud Rate Gen.
GND Hardwired or Jumpers S1 S2 S3 S4 S5 Address Decoder for COM1-4 and LP1-2
UART Channel B (same as channel A block)
PD0-PD7 RESET 7.3728 MHz XTAL1 (22.1184 MHz) XTAL2 Divide by 3 1284 Bi-directional Parallel Port Controller with Level II Electrical Interface INIT# STROBE# SELCTIN# AUTOFD# PDIR PE SELECT BUSY ACK# ERR#
Osc./ Buffer
To Parallel Printer Port
Figure 2. Functional Block Diagram with Manual Configuration Interface.
Rev. P1.00
3
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