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Details, datasheet, quote on part number:XR98L59
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| Part: | XR98L59 |
| Category: | Multimedia => Video => Processors => Image Processor/Correction |
| Description: | CCD Image Digitizers With Cds, Pga And 10-bit A/D |
| Company: | Exar Corporation |
| Datasheet: | Download XR98L59 datasheet File size : 781 kB |
| Request For quote: | Find where to buy XR98L59
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Datasheet text preview:
Preliminary
FEATURES · 10-bit Resolution ADC · 20MHz Sampling Rate · Programmable Gain: 6dB to 38dB PGA (2x to 80x) · Improved Digitally Controlled Offset-Calibration with Pixel Averager and Hot Pixel Clipper · DNS Filter Removes Black Level Digital Noise · Widest Black Level Calibration Range at Maximum Gain · Manual Control of Offset DAC via Serial Port for Use with High Speed Scanners · 2ns/step Programmable Aperture Delay on SPIX and SBLK · Single 5V ± 10% or 3V ± 10% Power Supply · Low Power for Battery Operation XRD9859: 250mW @ VDD =5.0V XRD98L59: 120mW @ VDD=3.0V GENERAL DESCRIPTION The XRD9859 is a complete low power CCD Image Digitizer for digital, motion and still cameras. The product includes a high bandwidth differential Correlated Double Sampler (CDS), 8-bit digitally Programmable Gain Amplifier (PGA), 10-bit Analog-to-Digital Converter (ADC) and improved digitally controlled black level auto-calibration circuitry with pixel averager hot pixel clipper, and a DNS filter. The Correlated Double Sampler (CDS) subtracts the CCD output signal black level from the video level. Common mode signal and power supply noise are rejected by the differential CDS input stage. The PGA is digitally controlled with 8-bit resolution on a linear dB scale, resulting in a gain range of 6dB to 38dB with 0.125dB per LSB of the gain code. ORDERING INFORMATION
Part No. XRD9859AIU XRD98L59AIU Package 28-Lead SSOP 28-Lead SSOP
XRD9859/98L59
CCD Image Digitizers with CDS, PGA and 10-Bit A/D
March 2000-3
· · · ·
10µA Typical Stand By Mode Current Three-State Digital Outputs 2,000V ESD Protection 28-pin SSOP Package
APPLICATIONS · Digital Still Cameras · · · · · · · Digital Camcorders PC Video Cameras CCTV/Security Cameras Industrial/Medical Cameras 2D Bar Code Readers High Speed Scanners Digital Copiers
The auto calibration circuit compensates for any internal offset of the XRD9859 as well as black level offset from the CCD. The PGA and black level auto-calibration are controlled through a simple 3-wire serial interface. The timing circuitry is designed to enable users to select a wide variety of available CCD and image sensors for their applications. The XRD9859 has direct access to the ADC input for digitizing other analog signals. The XRD9859 is packaged in 28-lead surface mount SSOP to reduce space and weight, and is suitable for hand-held and portable applications.
Operating Temperature Range Power Supply -40°C to 85°C -40°C to 85°C 5.0V 3.0V
Maximum Sampling Rate 20 MSPS 20 MSPS
Rev. P1.00
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 · (510) 668-7000 · FAX (510) 668-7017 · www.exar.com
XRD9859/98L59
Preliminary
AVDD
VRT AVDD 140 400
VRB 60 AGND
DVDD
OVDD 10
CCDin CDS REFin SPIX SBLK CLAMP CAL Coarse Accumulator Fine Accumulator Internal Clock Generator 10 4-bit CDAC 10-bit FDAC Black Level Offset Calibration Loop Manual DAC Control Hot Pixel Clipper + PGA1 + PGA2 ADCIN OGND 10-bit ADC Reg DB[9:0]
Power Down PD
Offset Calibration Logic Clock Control Calibration Mode SCLK SDI LOAD Serial Interface and Registers Gain Code Offset Code Power Down
DNS Filter
+ + -
Pixel Averager
AGND
DGND
Figure 1. XRD9859 Block Diagram
Rev. P1.00
2
Preliminary
PIN CONFIGURATION
OVDD DB5 DB6 DB7 DB8 DB9 DVDD DGND SCLK SDI LOAD PD VRT AVDD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15
XRD9859/98L59
OGND DB4 DB3 DB2 DB1 DB0 SBLK SPIX CLAMP CAL VRB AGND REFin CCDin
28-Lead SSOP PIN DESCRIPTION
Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Symbol OVDD DB5 DB6 DB7 DB8 DB9 DVDD DGND SCLK SDI LOAD PD VRT AVDD CCDIN REFIN AGND VRB CAL CLAMP SPIX SBLK DB0 DB1 DB2 DB3 DB4 OGND Description Digital Output Power Supply (< AVDD ) ADC Output ADC Output ADC Output ADC Output ADC Output, MSB Digital Power Supply (Must = AVDD ) Digital Ground. Connect to AGND Shift Clock. Latches SDI data on Serial Port Serial Data Input. Serial Port Data Load. Serial Port Power Down, Active High Top ADC Reference. Sets full scale of ADC Analog VDD CDS inverting input. Connect through capacitor to CCD signal Reference input (CDS non inverting input). Connect through capacitor to CCD Ground Analog Ground Bottom ADC Reference. Sets zero for ADC. Optical Black (OB) Clamp CDS DC Restore Clamp Sample Video Pixel (CDS Clock) Sample Black Reference (CDS Clock) ADC Output, LSB ADC Output ADC Output ADC Output ADC Output Digital Output GND. Connect to AGND
Rev. P1.00
3
XRD9859
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